This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM62L: AM62L SDIO_LDO capacitor

Part Number: AM62L

The datasheet says for the SDIO LDO pin

This pin must always be connected via a 6.3V or greater, 3.3 uF ± 20% capacitor to VSS when the SDIO_LDO is being used to source VDDSHV3. The capacitor selected must provide a capacitance within the defined range after it has been derated for DC-bias, operating temperature, and aging effects. Otherwise, this pin may be connected directly to VSS when the VDDA_3P3_SDIO pin is also connected directly to VSS.

What is the "defined range" for the capacitance after it has been derated?

3.3uF is a difficult value to find, especially in a 0402 size part which is required in my design for fit.  Can a 4.7uF value 0402 capacitor be used instead?

  • Hello David,

    A 3.3uF capacitor provides the correct voltage transition timing when the SDIO-LDO output (CAP_VDDSHV_MMC1) is required to change from 3.3V to 1.8V.

    A 4.7uF capacitor may not be discharged from 3.3V to 1.8V before communications with the SD card resumes after it is told to change IO operating voltage.

    Best Regards,

    Borislav Lazarkov