Part Number: AM62L
The datasheet says for the SDIO LDO pin
This pin must always be connected via a 6.3V or greater, 3.3 uF ± 20% capacitor to VSS when the SDIO_LDO is being used to source VDDSHV3. The capacitor selected must provide a capacitance within the defined range after it has been derated for DC-bias, operating temperature, and aging effects. Otherwise, this pin may be connected directly to VSS when the VDDA_3P3_SDIO pin is also connected directly to VSS.
What is the "defined range" for the capacitance after it has been derated?
3.3uF is a difficult value to find, especially in a 0402 size part which is required in my design for fit. Can a 4.7uF value 0402 capacitor be used instead?