[FAQ] AM62A7: C7X.CPU5 Illegal Operation and Instruction Trapping Implementation

The safety Manual has following description:

The Cortex®-R5F CPU, A72 CPU, C7x CPU, and Arm® Cortex®-M4F (SMS) include diagnostics for illegal operations and instructions that can serve as safety mechanisms. Many of these traps are not enabled after reset and must be configured by the software. TI highly recommends installing software handlers to support the hardware illegal operation and instruction trapping. Examples of CPU illegal operation and instruction traps include:

• Illegal instruction 
• Floating-point underflow and overflow 
• Floating-point divide by zero
• Privilege violation

To trigger Illegal Instruction use the below code which is trying to execute a opcode which is not defined on C7x:

void illegalInst(void){
    __asm__ volatile(" .word 0x00000000");
}

The code goes to exception handler and following registers gets updated:

IERR= 0x0000000000000010

To trigger Floating-point underflow and overflow use the below code:

void floating_pt_overflow(void) {
    float a = FLT_MAX;
    float b = FLT_MAX;
    volatile float result = a * b;
    DebugP_log("Result: %f\n", result);
}

void floating_pt_underflow(void) {
    float a = FLT_MIN;
    float b = FLT_MIN;
    volatile float result = a * b;
    DebugP_log("Result: %f\n", result);
}

The following FSR bits get altered but the CPU continues the normal execution:

UNDER_0= 1   

OVER_0= 1   

To trigger Floating-point divide by zero use the below code:

void floating_pt_div_zero(void) {

        float4 a = float4(0) ;
        float4 result = __recip(a);
    DebugP_log("Result: %f\n", result);

}

The following FSR bit gets altered but the CPU continues the normal execution:

DIV0_0= 1    

To trigger Privilege violation use the below code which is attempting to unset the core internal TSR register:

void TestPrivilegeViolation(){
    __TSR=0;
}

The code goes to exception handler and following registers gets updated:

IERR=  0x0000000000000080   

IEAR=  0x0000000000000004