Can you confirm that the boot pins are latched only during a cold start? It looks like there was conflicting data on this..I found the following that states that only during cold start do the pins get latched
It does state under the "DURING RESET" section at the top that the boot pins will NOT be latched when reset goes high after a WARM RESET...See the excerpt below..There is some mention of pull down resistors etc in the following paragraphs that may be a work around, but I think what you are seeing is correct.. Not sure about the app note you reference I will try and find that as well.
There are two types of reset:
- Power-On Reset (POR)- POR occurs when both RESET and TRST are low. Internal memory is cleared during this state. The boot pins will be latched when RESET goes high
- Warm Reset - Warm Reset occurs when RESET is low and TRST is high. Internal memory is retained during this state. The boot pins will be not be latched when RESET goes high, but instead retain the same values from the last POR.
yet in the following document it states as long as the RESET is deasserted it will latch..
SPRUGM9A–November 2010 section 12.1 states... "The input states of the BOOT pins are sampled and latched into the
BOOTCFG register, which is part of the system configuration (SYSCFG) module, when device reset is deasserted. Boot mode
selection is determined by the values of the BOOT pins." This is incorrect. The BOOT pins are only latched during a cold boot.
They will not load when reset deasserts.
