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J722SXH01EVM: CCS Load error with J722S EVM

Aparna Dutta
Prodigy 50 points

Part Number: J722SXH01EVM
Other Parts Discussed in Thread: AM67

I have installed the CCS version 21.0.0 on my Ubuntu laptop and trying to connect and debug code on a J722S EVM.

I am trying to follow the instructions on https://software-dl.ti.com/ccs/esd/documents/users_guide_ccs_21.0.0/ccs_getting-started.html to get started with running a simple program on the EVM, specifically on one of the DSPs. I followed section 4.4.1 to create a new empty project for the C7x core and then tried to run the program on the target following the steps in section 4.5. While loading the program, I get these errors:

C75X_0: File Loader: Verification failed: Values at address 0x0000000000002018 do not match (expected: 0x40, actual: 0x00) Please verify target memory and memory map.
C75X_0: GEL: File: /home/aparna/workspace_ccstheia/MyTry/Debug/MyTry.out: a data verification error occurred, file load failed.

The above errors are with the DIP switches set to SD-card boot. Do we need some GEL files to do the proper initialization before loading ? I could not locate any GEL files for this EVM in the CCS folder.

On setting the boot-switches to No-boot mode, I am getting this error on trying to load and debug the program.
CS_DAP_0: Error connecting to the target: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 21.0.0.3955) 

Please suggest the right sequence of steps to be able to run and load a stand-alone program on the DSPs.

Regards,

Aparna

  • 0
    TI__Expert 7330 points

    Hi Aparna,

    Please follow the steps mentioned in https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-j722s/latest/exports/docs/psdk_rtos/docs/user_guide/ccs_setup_j722s.html#.  The .ccxml file is attached below for your reference.

    j722s.zip

    Please try with the following switch config:

    Regards,

    Betsy Varughese

  • 0 in reply to Betsy Varughese
    Prodigy 50 points

    Hi Betsy,

    This link that you shared expects that the C7x program is already loaded by the HLOS running on A53. I have 2 questions, that are seemingly related but may not be:

    1. We would like to load a stand-alone c7x program from CCS without the involvement of HLOS. What are the steps for that ?

    2. How can we use a HLOS (linux) running on A53 to load a program onto C7x and see some prints on the console from C7x ? 

    Regards,

    Aparna

  • 0 in reply to Aparna Dutta
    TI__Expert 7330 points

    Hi Aparna,

    Could you please try the following steps:

    Please configure the switch as follows:

    Create the .ccxml (target configuration file) : 7215.j722s.zip

    Launch the target config file created → Connect to the required core → load the the application binary.

    You can also refer :software-dl.ti.com/.../CCS_LAUNCH_PAGE.html

    Regards,

    Betsy Varughese

  • 0 in reply to Betsy Varughese
    TI__Expert 7330 points

    Hi Aparna,

    1. Setup CCS and create target configuration by following this Link.
    2. Then folllow the steps mentioned in the EVM setup session. EVM setup page 
    3. Flash SOC Initialization Binary - This is a recommended one time step that needs to be done before you can load and run programs via CCS.
    4. Build the code.
    5. CCS Launch, Load and Run.

    Regards,

    Betsy Varughese

  • +1 in reply to Betsy Varughese
    TI__Expert 7330 points

    Hi Aparna,

    I have elaborated on the steps mentioned above. Please let me know if you are still facing any issues.

    Prerequisites (one-time)

    1. Install CCS 12.8.1 (https://www.ti.com/tool/download/CCSTUDIO/12.8.1) and the MCU+ SDK for J722S (mcu_plus_sdk_j722s).
    2. Build the SDK once so you have the SBL and example .out files: 
      cd ${SDK_INSTALL_PATH}
make -sj4 all
    3. Connect the EVM: power supply, the XDS110 USB (JTAG + UART) cable, and note the enumerated COM/tty ports (115200-8-N-1).

    Create the CCS target configuration [Link]

    1. In CCS: View → Target Configurations → New.
    2. Name it, e.g. J722S_XDS110.ccxml
    3. Connection = Texas Instruments XDS110 USB Debug Probe.
    4. Board/Device = type J722S and select J722S_TDA4VEN_TDA4AEN_AM67.
    5. Save. 
    6. Test connection.

    SOC Initialization (required before JTAG load to C75x) [Link]

    The C75x core cannot be loaded straight from cold reset — the SoC must be initialized first by an SBL. The standard MCU+ SDK approach is to flash the SBL NULL bootloader once, then boot from OSPI so the SoC initializes itself and parks the cores ready for a JTAG load.

    1. Power off the EVM. Set UART boot mode — SW4: 0000 0000, SW3: 1101 1100.
    2. Power on; confirm a C prints every ~2 s on the flashing UART port. Close the CCS UART terminal.
    3. Flash the SBL null: 
      cd ${SDK_INSTALL_PATH}/tools/boot
      python uart_uniflash.py -p COM<x> --cfg=sbl_prebuilt/j722s-evm/default_sbl_null_nor_hs_fs.cfg
    4. Power off. Set OSPI NOR boot mode — SW4: 0100 0000, SW3: 1100 1110.
    5. Power on. The SBL null runs, initializes the SoC, and holds the cores — the UART will report successful SOC init.

    Load and run on C75x via CCS

    1. Launch the target configuration (right-click → Launch Selected Configuration). If JTAG fails to connect, power the board on before attaching, then launch.
    2. In the Debug view, select C75x_0 (or C75x_1) and Connect Target.
    3. Reset the CPU (CPU Reset).
    4. Run → Load → Load Program, browse to your standalone .out.
    5. The program loads and halts at main().
    6. If the example is multi-core (IPC, etc.), repeat the load on the other required cores.
    7. Resume to run. Output appears on the CCS console and/or the UART terminal.

    Switch Configuration details - UART & NOR

    Regards,

    Betsy Varughese

  • 0 in reply to Betsy Varughese
    Prodigy 50 points

    Hi Betsy,

    Thank you for your support. I was able to load and run the example program on the DSP.

    Regards,

    Aparna