AM625: eMMC signals slew rate low

Hi Tony,

Thank you for your query !

Just in case, I would like to ask, is there currently any series termination resistor near the AM625 MMC0_CLK pin with a value more than 0 Ohms (non-dummy) ?

(I assume they may have placed 10 Ohms at least, deducing this from the minimal ringing observed on the scope image).

A bigger series termination resistance value than the optimal value can indeed decrease the slew rate.

Has customer performed any IBIS based simulations at 200 MHz considering the above layout configuration ? This I think is strongly recommended in case of SDIO pin buffer (MMC0_CLK).

I will let our signal integrity expert Sreenivasa comment on the eMMC layout parameters (the clock PCB trace impedance matching versus the eMMC CLK source output). 

Thank you

Best Regards,

Anastas Yordanov

This is the schematic, resistor on eMMC_CLK is 20ohm.

The default MMC IO impedance is 40ohm, what is the route impedance preferred?

Hello Tony,

Please refer below reply:

The 20 Ohm source-series resistor seems suspect. What is the exact OPN they have? Once I get that, I can run a quick simulation to see how that resistor impacts things.

Please share the OPN for the expert to perform some simulations.

Regards,

Sreenivasa

Kallikuppa Sreenivasa said:

What is the exact OPN they have?

AM6254BTCFHIALWRQ1

Hello Tony,

Thank you.

Let me follow-up with the expert and come back.

Regards,

Sreenivasa

Hello Tony,

Both of your pictures indicate you are taking the 20-80 slew rate:

It looks like you did ((1.8V*0.8-1.8V*0.2)/1.35ns = 0.8 V/ns) in the first picture to get the described 0.8 V/ns slew rate, and in the second picture, horizontal markers are set at 1.8V*0.8=1.44V and 1.8V*0.2=0.36V.

As seen below, the eMMC spec indicates that the V_IH and V_IL levels are at 65% and 35% of the supply voltage so slew rate should be calculated in these ranges.

I would measure the 35-65 slew rate and see what you get. Additionally, I ran a quick simulation, and the biggest knobs I found that will impact the slew rate in your system are the series resistor and the load capacitance of the flash device.

Regards,

Seif 

Seif Ksouri said:

I ran a quick simulation, and the biggest knobs I found that will impact the slew rate in your system are the series resistor and the load capacitance of the flash device

1. The series resistor can be adjusted even be removed, customer tried it but didn't get visible improvement.
2. The flash device's load capacitance is not adjustable, is it right?
3. AM62x side eMMC IO impedance default to 40ohm, but the layout is 50ohm, and the default eMMC device IO impedance is also 50ohm, what is your suggestion on adjusting IO impedance on current board, if adjust eMMC device to lower impedance helps?
4. What is your suggestion on the layout impedance for respin?

Hey Tony,

1) Can the customer attach screenshots of the 35-65 slew rate with and without the 20 Ohm resistor? (Ideally using the scope from the first picture as the one from the second does not have enough bandwidth)

2) Yes, the only way to adjust flash load capacitance is to select a different eMMC flash device.

3+4) The best way to get a decent answer to these questions are to run IBIS simulations.

Regards,

Seif

Hi Tony,

Would you please confirm whether customer is satisfied with the answers or needs additional help.

Let us know if we can close the thread.

Thank you !

Best Regards,

Anastas Yordanov

Hello Tony, 

Thank you for the note, appreciated.

Is there a waveform you could attach for reference.

Regards,

Sreenivasa

FYI