AM625: How to Disable DDR Command Bus Training

Part Number: AM625

Hi team,

We are studying the behavior of DRAM Command Bus Training (CBT) on AM62x EVM.
I have tried to set PI_61 bit[0]=0, PI_199 bit[16]=0 bit[8]=0 bit[0]=0, but still unable to disable CBT.
Could you guide me about how to disable CBT at the initial stage?
Thanks.

B.R,
Maurice

  • Hi Maurice, I'm not sure that can be done, i will have to check.

    Can you try disabling all training with PI_4[0] = 0?  Let me know if this disables CBT , i know it disables all the other training at operating frequency.

    Regards,

    James

  • Hi James,

    Thanks, we will check that.
    Regarding CBT, we suspect that power may impact the training result.
    Could you guide us about how to adjust VDD1/VDD2/VDDQ?
    Thanks.

    B.R,
    Maurice

  • Our EVMs have PMICs which have most voltage rails that are controlled via I2C.  These can be adjusted in uboot with a few commands.  Which EVM are you working with? 

    Regards,

    James