Could you please supply a little more detailed documentation on how the SD analog video DACs are mapped to the device pins. The information supplied in the datasheet (SPRS614B), in the technical reference manual (SPRUGX8, 1 July 2011) and in the Netra EVM schematic drawing (512872-0001) appears to be unsufficient to give a thorough and unambiguous view of which analog SD video signal is mapped to which device pin.
According to SPRUGX8 (pp. 341 - 342) the four SD video DACs may generate the following signals:
SD DAC A: Red and Y
SD DAC B: Green and C
SD DAC C: Blue
SD DAC D: CVBS (COMPOSITE)
On page 340 an SD DAC Control Register is defined with a couple of swap control bits (SD_MIDRND) with some undocumented effect.
According to SPRS614B (p. 109) there are four analog SD video output signals mapped to the device pins as follows:
IOUTD - pin AR20 (Video DAC D output. Analog SD Video DAC)
IOUTE - pin AT19 (Video DAC E output. Analog SD Video DAC)
IOUTF - pin AT20 (Video DAC F output. Analog SD Video DAC)
IOUTG - pin AU20 (Video DAC G output. Analog SD Video DAC)
Which SD video signal that is mapped to which of the pins is not mentioned.
According to the Netra EVM schematic (sheets 9, 42 and 43) the following connections are established:
to connectors J4 and P1 on sheet 42:
Pin U31:AR20 - IOUTD - J4:2 "COMPOSITE"
Pin U31:AT19 - IOUTE - P1:3 "S-VIDEO Y"
Pin U31:AT20 - IOUTF - P1:4 "S-VIDEO C"
and to connector J9 on sheet 43:
Pin U31:AR20 - ALT_IOUTD - J9:11 "SCART GRN" and J9:19 "SCART COMPOSITE"
Pin U31:AT19 - ALT_IOUTE - J9:7 "SCART BLUE"
Pin U31:AT20 - ALT_IOUTF - P9:15 "SCART RED/SVIDEO_C"
Pin U31:AU20 - IOUTG - P9:16 "SEL RGB COMPOSITE"
In the available sources of documentation the mapping of the SPRUGX8 SD DACs A to D to the SPRS614B SD video DAC pins D to G seems to be missing.
Further, SPRUGX8 states the combined SD DAC sources of "Red and Y", of "Green and C" and the single sources of "Blue" and of "CVBS" respectively.
But, the EVM schematic indicates that the SD DAC sources are combined as "Red and C", "Green and COMPOSITE", and "Blue and Y". (And that the fourth DAC is used as a logic output.)
To me this seems to be a contradiction.
Question 1: How are the SPRUGX8 DACs A, B, C, and D mapped to the SPRS614B DACs D, E, F, and G?
Question 2: How is it possible to change the multiplexing of the signals from the SPRUGX8 DACs to the SPRS614B pins so that the signal combinations on the pins differ from the possible signal combinations at the DACs?
Question 3: How is it possible to control IOUTG as a logic output?
Question 4: What impact do the different combinations of the register bits SD_MIDRND in register SD_DAC_CTRL have on the analog SD video DAC signals?
Question 5: Where may I find documentation on the above topics?
Best regards
SH