Part Number: DRA821U-Q1
How to enable USXGMII + PCIE on MAIN CPSW5G in J7200 EVM ?
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Part Number: DRA821U-Q1
How to enable USXGMII + PCIE on MAIN CPSW5G in J7200 EVM ?
Hi Gokul,
The below configuration enables PCIE+USXGMII on J7200 EVM.
Note: 10G is supported only from MAC Port-1 on Silicon Revision 2 SoC.
NOTE: This was tested on J7200 EVM 11.02 LINUX SDK:
diff --git a/dts/upstream/src/arm64/ti/k3-j7200-main.dtsi b/dts/upstream/src/arm64/ti/k3-j7200-main.dtsi
index 71f4eba4..2fccd3c7 100644
--- a/dts/upstream/src/arm64/ti/k3-j7200-main.dtsi
+++ b/dts/upstream/src/arm64/ti/k3-j7200-main.dtsi
@@ -715,7 +715,7 @@
assigned-clocks = <&k3_clks 292 85>;
assigned-clock-parents = <&k3_clks 292 89>;
-
+ status = "disabled";
wiz0_pll0_refclk: pll0-refclk {
clocks = <&k3_clks 292 85>, <&serdes_refclk>;
clock-output-names = "wiz0_pll0_refclk";
@@ -755,6 +755,7 @@
clock-names = "refclk";
#address-cells = <1>;
#size-cells = <0>;
+ status="disabled";
};
};
# This uEnv.txt file can contain additional environment settings that you # want to set in U-Boot at boot time. This can be simple variables such # as the serverip or custom variables. The format of this file is: # variable=value # NOTE: This file will be evaluated after the bootcmd is run and the # bootcmd must be set to load this file if it exists (this is the # default on all newer U-Boot images. This also means that some # variables such as bootdelay cannot be changed by this file since # it is not evaluated until the bootcmd is run. name_overlays=ti/k3-j7200-evm-usxgmii-exp1.dtbo
sudo ln -s -f ti-ipc/j7200/ipc_echo_test_mcu2_0_release_strip.xer5f j7200-main-r5f0_0-fw sync
Output logs:


Best Regards
Gokul Praveen