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DRA821U: U-Boot and ethernet PHY

David Arneson
Prodigy 50 points

Part Number: DRA821U
Other Parts Discussed in Thread: DRA821

Running U-Boot SDK9.02 about 5% of the time the MAC port on the DRA821 fails to connect to the DP83867 PHY. Power cycle the board and it will work fine the next time.

  • 0
    TI__Mastermind 43890 points

    Hi,

    Can you share the logs for the error case and the working case.

    Is the connection RGMII or SGMII?

    Regards,
    Tanmay

  • 0 in reply to Tanmay Patil
    Prodigy 50 points

    We are RGMII from the device tree phy-mode = "rgmii-rxid";.

    I have the following files saved from a boot. There are a few debug printf in place labeled by CSD: Of interest failed doesn't try to auto negotiate.. You will also see a printf that has 0's in the failure and non zeros on good.

    Failure:

    Fullscreen failed_trace.txt Download 
    U-Boot SPL 2023.04 (Jul 14 2026 - 18:22:47 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
i2c_write: error waiting for data ACK (status=0x116)
read error from device: 41c86438 register: x!
Trying to boot from SPI
Authentication passed
Authentication passed
Authentication passed
Returning so no mux is selected. We dont have this on Hydra
Loading Environment from nowhere... OK
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.10.0(release):
NOTICE:  BL31: Built : 18:22:21, Jul 14 2026

U-Boot SPL 2023.04 (Jul 14 2026 - 18:22:25 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
Trying to boot from SPI
k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,32] sci-dev-id:235
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled
jedec_spi_nor flash@0: non-uniform erase sector maps are not supported yet.
Authentication passed
Authentication passed
Returning so no mux is selected. We dont have this on Hydra


U-Boot 2023.04 (Jul 14 2026 - 18:22:25 -0500)

SoC:   J7200 SR2.0 HS-FS
Model: Texas Instruments K3 J7200 SoC
Board: J7200X-PM1-SOM rev E7
DRAM:  1 GiB
cdns3_bind: unsupported dr_mode
Core:  93 devices, 32 uclasses, devicetree: separate
Flash: 0 Bytes
MMC:   mmc@4f80000 - probe failed: -22
mmc@4fb0000: 1
Loading Environment from SPIFlash... k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,32] sci-dev-id:235
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled
jedec_spi_nor flash@0: non-uniform erase sector maps are not supported yet.
SF: Detected s28hs512t with page size 256 Bytes, erase size 256 KiB, total 64 MiB
*** Warning - bad CRC, using default environment

In:    serial@40a00000
Out:   serial@40a00000
Err:   serial@40a00000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
Net:   CSD: in dp83867_config
CSD: in dp83867_of_init
CSD: Phy CFG4 reg is 0x10b1
eth0: ethernet@46000000port@1
Starting POST
POST Now executing Memory alternating 1/0...  Passed
POST Now executing Memory marching 1s address...  Passed
POST Now executing Memory alternating 0/1...  Passed
POST Now executing Memory marching 1s...  Passed
POST Now executing Memory marching 0 Address...  Passed
POST Now executing BIST startup tests...  Passed
POST Now executing Memory marching 0s...  Passed
POST Now executing MCU VMON POK...  Passed
POST Now executing POR VMON POK...  Passed
POST Now executing ADC Glitch detected low...  Passed
POST Now executing ADC Glitch detected hi...  Passed
POST Now executing PMIC Buck 1/2 tests...  Passed
POST Now executing PMIC BUCK 3/4 tests...  Passed
POST Now executing PMIC Buck 5 tests...  Passed
POST Now executing PMIC LDO 1/2 tests...  Passed
POST Now executing PMIC LDO 3/4 tests...  Passed
POST Now executing HART EEPROM Test...  
POST Error: HART EEPROM Test, HART EEPROM not programmed
POST Now executing Temperature Sensors testing...  Passed
POST execution complete!


Hit any key to stop autoboot:  2  1  0 
am65_cpsw_nuss_port ethernet@46000000port@1: K3 CPSW: rflow_id_base: 2
CSD: leaving am65_cpsw_macsl_reset i = 0x64
am65_cpsw_nuss_port ethernet@46000000port@1: CSD: mac_control is 0x0, port->mac_control is 0x0, phy->link is 0x0
am65_cpsw_nuss_port ethernet@46000000port@1: CSD: mac_control == port->mac_control, so don't write mac_control. mac_control is 0x0 and phy->link is 0x0
am65_cpsw_nuss_port ethernet@46000000port@1: CSD: am65_cpsw_update_link failed
CSD: leaving am65_cpsw_macsl_wait_for_idle i = 0xffffffff and idle bits 0xf0000000
am65_cpsw_nuss_port ethernet@46000000port@1: am65_cpsw_start end error
CSD: image_get_magic is 0x1000100
Wrong Image Format for bootm command
ERROR: can't get kernel image!
=>

    Passed:

    Fullscreen good_trace.txt Download 
    U-Boot SPL 2023.04 (Jul 14 2026 - 18:22:47 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
i2c_write: error waiting for data ACK (status=0x116)
read error from device: 41c86438 register: x!
Trying to boot from SPI
Authentication passed
Authentication passed
Authentication passed
Returning so no mux is selected. We dont have this on Hydra
Loading Environment from nowhere... OK
Authentication passed
Authentication passed
Starting ATF on ARM64 core...

NOTICE:  BL31: v2.10.0(release):
NOTICE:  BL31: Built : 18:22:21, Jul 14 2026

U-Boot SPL 2023.04 (Jul 14 2026 - 18:22:25 -0500)
SYSFW ABI: 3.1 (firmware rev 0x0009 '9.2.4--v09.02.04 (Kool Koala)')
Trying to boot from SPI
k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,32] sci-dev-id:235
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled
jedec_spi_nor flash@0: non-uniform erase sector maps are not supported yet.
Authentication passed
Authentication passed
Returning so no mux is selected. We dont have this on Hydra


U-Boot 2023.04 (Jul 14 2026 - 18:22:25 -0500)

SoC:   J7200 SR2.0 HS-FS
Model: Texas Instruments K3 J7200 SoC
Board: J7200X-PM1-SOM rev E7
DRAM:  1 GiB
cdns3_bind: unsupported dr_mode
Core:  93 devices, 32 uclasses, devicetree: separate
Flash: 0 Bytes
MMC:   mmc@4f80000 - probe failed: -22
mmc@4fb0000: 1
Loading Environment from SPIFlash... k3-navss-ringacc ringacc@2b800000: Ring Accelerator probed rings:286, gp-rings[96,32] sci-dev-id:235
k3-navss-ringacc ringacc@2b800000: dma-ring-reset-quirk: disabled
jedec_spi_nor flash@0: non-uniform erase sector maps are not supported yet.
SF: Detected s28hs512t with page size 256 Bytes, erase size 256 KiB, total 64 MiB
*** Warning - bad CRC, using default environment

In:    serial@40a00000
Out:   serial@40a00000
Err:   serial@40a00000
am65_cpsw_nuss ethernet@46000000: K3 CPSW: nuss_ver: 0x6BA02102 cpsw_ver: 0x6BA82102 ale_ver: 0x00293904 Ports:1 mdio_freq:1000000
Net:   CSD: in dp83867_config
CSD: in dp83867_of_init
CSD: Phy CFG4 reg is 0x10b1
eth0: ethernet@46000000port@1
Starting POST
POST Now executing Memory alternating 1/0...  Passed
POST Now executing Memory marching 1s address...  Passed
POST Now executing Memory alternating 0/1...  Passed
POST Now executing Memory marching 1s...  Passed
POST Now executing Memory marching 0 Address...  Passed
POST Now executing BIST startup tests...  Passed
POST Now executing Memory marching 0s...  Passed
POST Now executing MCU VMON POK...  Passed
POST Now executing POR VMON POK...  Passed
POST Now executing ADC Glitch detected low...  Passed
POST Now executing ADC Glitch detected hi...  Passed
POST Now executing PMIC Buck 1/2 tests...  Passed
POST Now executing PMIC BUCK 3/4 tests...  Passed
POST Now executing PMIC Buck 5 tests...  Passed
POST Now executing PMIC LDO 1/2 tests...  Passed
POST Now executing PMIC LDO 3/4 tests...  Passed
POST Now executing HART EEPROM Test...  
POST Error: HART EEPROM Test, HART EEPROM not programmed
POST Now executing Temperature Sensors testing...  Passed
POST execution complete!


Hit any key to stop autoboot:  2  1  0 
am65_cpsw_nuss_port ethernet@46000000port@1: K3 CPSW: rflow_id_base: 2
CSD: leaving am65_cpsw_macsl_reset i = 0x64
ethernet@46000000port@1 Waiting for PHY auto negotiation to complete. done
am65_cpsw_nuss_port ethernet@46000000port@1: CSD: mac_control is 0xa1, port->mac_control is 0x0, phy->link is 0x1
link up on port 1, speed 1000, full duplex
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
DHCP client bound to address 10.0.1.223 (1002 ms)
Using ethernet@46000000port@1 device
TFTP from server 10.0.1.1; our IP address is 10.0.1.223
Filename 'ice2/ice2-vip'.
Load address: 0x81000000
Loading: *##################################################  7.2 MiB
	 12 MiB/s
done
Bytes transferred = 7553848 (734338 hex)
CSD: leaving am65_cpsw_macsl_wait_for_idle i = 0xffffffff and idle bits 0xf0000000
CSD: image_get_magic is 0x27051956
## Booting kernel from Legacy Image at 81000000 ...
CSD: image_get_magic is 0x27051956
   Image Name:   vxworks
   Image Type:   AArch64 VxWorks Kernel Image (uncompressed)
   Data Size:    7553784 Bytes = 7.2 MiB
   Load Address: 80100000
   Entry Point:  80100000
   Verifying Checksum ... OK
CSD: image_get_magic is 0x27051956
CSD: image_get_magic is 0x27051956
CSD: image_get_magic is 0x27051956
Working FDT set to 0
   Loading Kernel Image
   !!! WARNING !!! Using legacy DTB
## Starting vxWorks at 0x80100000, device tree at 0x00000000 ...
protecting primary core interrupt stack

protecting root task stacks

protecting idle tasks

initialize VxBus

	install bus types:

		vxbMiiBus(MII bus type)

		vxbPciBus(PCI bus type)

		vxbFdtBus(Flattened Device Tree bus type)

		vxbNexusBus(Nexus bus type)

		vxbIeee1588Bus(IEEE1588 bus type)

	probe and attach devices

Tprotecting non-primary core interrupt stacks

arget Name: scp 
User: target 
 
 _________            _________
 \........\          /......../
  \........\        /......../
   \........\      /......../
    \........\    /......../
     \........\   \......./
      \........\   \...../              VxWorks SMP 64-bit
       \........\   \.../
        \........\   \./     Release version: 25.03
         \........\   -      Build date: Jul  9 2026 18:36:23
          \........\
           \......./         Copyright Wind River Systems, Inc.
            \...../   -                 1984-2026
             \.../   /.\
              \./   /...\
               -   -------

                   Board: GEHC MR ICE2 J7200 - Cortex-A72 (ARMV8A)
               CPU Count: 2
          OS Memory Size: 679MB
        ED&R Policy Mode: Deployed
     Debug Agent: Not started
         Stop Mode Agent: Not started


 Adding 15820 symbols for standalone.

  • 0 in reply to David Arneson
    TI__Mastermind 43890 points

    Hi,

    It is weird that we are not seeing any phy autonegotiation heppening in the failure case.

    Sorry to ask this, but can you confirm that both are running on the exact same software.

    In the failed trace, are you able to see any phy on the mdio lines from u-boot? You can see this by running command "mdio list"

    Regards,
    Tanmay