Part Number: AM6422
Hi TI,
We are currently investigate issue on PTP timestamping on TX using the legacy PRU/HSR firmware 100mbps from SDK 8.06 and we observe a strange behavior on the IEP when timestamping frames and seems to be related to the IPG (960ns for 100mbps). Indeed, we find that that timestamp are wrong of about ~600ns sometimes.
The IEP is correctly configured to timestamp on SOF for Tx event as defined in those registers:
Most of the time, the timestamping is working correctly with a good precision. When the ethernet bus is loaded with PTP frames and SV frames.
When the PRU want to send a PTP frame (in red), it will push first data bytes into the L1 FIFO which will push them into the MAC layer. We suppose that the timestamp for the IEP time is generated at this moment => no problem for the moments.
BUT, we have a case where the data are pushed into the L1 FIFO whereas the IPG time is not elapsed yet. This case can happen because of a cut through or a send of a previous frame and the PTP frame is also ready to be send.
In this case, the timestamp in generated when the L1FIFO is filled and try to push to the MAC but the IPG is not consumed. So the data remains in the L1 FIFO but the timestamp seems to be generated anyway which fooling the PTP algorithms.
Do you have knowledge of such behavior of the IEP timer (timestamp generated whereas the frame is not yet send due to IPG block) ?
If this behavior is confirmed, is there a way to manage this ? I suppose this is not a firmware issue but more related t othe PRU architecture and this could happen for the 1gbps version (but with less impact since the IPG is 96ns)
Tell me if you need more clarification,
Thanks,
Guillaume
