Brief description: When we use an mt9t112 camera in combination with an AM3715, with rowboat stack based software running on it (starting from omap3evm board and camera configuration), we do not get any image on the display when running the standard android camera application. Further investigation pointed out that we do not get any VD0 and VD1 interrupts in the ISP-layer, despite the fact that we do get the HS_VS_IRQ interrupts and the fact that all the signals coming from the camera are looking correct.
Question: Does anyone know what might be causing these problems?
Full description:
We are using a camera module based on the mt9t112 Aptina capture processor. The android system we use is based on the rowboat code stack. This code stack only has mt9t112 module code available for socket camera use. The mt9t111 driver is available in the rowboat stack for omap3evm usage (as it is part of the camera module that is available for the omap3evm) and uses the ISP CCDC block to generate a picture for android application layer use (via hardware/ti/omap3/camera interface block).
As we are using the rowboat-omap3 based code stack, we used the mt9t111 driver code model as base to generate an adjusted mt9t112 based kernel driver that supports the omap3 based ISP/v4l2 behavior. After driver completion, no image was visible on the display of the android device. Further study pointed out that the VD0 and VD1 interrupts are not generated by the ISP hardware. A check of the registers does point out though that these interrupts are enabled and that they are programmed to react at the correct number of horizontal syncs. We even tried lowering the VD0 and VD1 to lower values, but still the interrupts are not occurring.
Question: Is the horizontal sync counter register accessible for reading so that we could check if the value ever changes?
Some further remarks:
-The HS_VS_IRQ interrupts however are being generated (at the VS-rate), so that seems correct. We checked the signal/data lines coming from the camera with the scope and as well horizontal and vertical sync seem correct and also the data lines look fine (dark and light clearly noticeable and when selecting the walking one test, the data lines are reacting accordingly). All clocks look good too.
-All GPIO’s have been checked and as far as we can see, these are configured correctly.
-As a double check to see if the HS reach the ISP block correctly, we changed the SYNC_DETECT setting from "VS rising edge" to "HS rising edge" and when we run this code, the number of received HS_VS_IRQ's is drastically increased, indicating that the ISP block is receiving the HS signal correctly.
-We checked numerous other register settings and changed possible issues, but VD0 and VD1 interrupts are still not received.
We also tried generating virtual VD0 and VD1 interrupts (using a timer that is started by the HS_VS_IRQ). The virtual VD1 and VD0 interrupts are generated at the correct positions, but this does not solve any problems. This way we were able to verify that the buffers are being copied correctly and that this memory information was reaching the android camera application. This memory was filled with 0x00's, indicating that no data was placed into the memory by possible received Horizontal Syncs.
We also verified that the pad formats were the same resolution and format. Input and output pads are all set to 640x480 and in YUV422 mode.
Any suggestions on what we could check additionally to verify the problem or how we could solve this issue are welcome.
Best regards,
Hans Van Doninck
