DRA829J-Q1: ECC Aggregator/wrapper: meaning of the ACCESSIBLE flag? clarification of SECDEC operation?

Part Number: DRA829J-Q1

Team,
Can you please help with the below?

1.In the SDL, the SDL_ECC_aggrTable (ECC Aggregator, sdl_ecc_soc.h) together with the sub‑region definitions in sdl_soc_ecc_aggr.h provide the RAM IDs, each with an ACCESSIBLE property,
for example:
Code:
#define SDL_MCU_R5FSS0_CORE0_ECC_AGGR_CPU0_DDATA_RAM1_ACCESSIBLE     (1U)
#define SDL_MCU_R5FSS0_CORE0_ECC_AGGR_MEM_MST0_KSBUS_AXI2VBUSM_R_EDC_CTRL_ACCESSIBLE  (0U)

-What is the meaning of the ACCESSIBLE flag in this context?

2. According to the SDL documentation:

2.1. INJECT_TYPE
2.1.1. INJECT_TYPE = 1 → the ECC wrapper operates in inject‑only mode; the IP fabric performs SECDED.
2.1.2. NJECT_TYPE = 0 → the ECC wrapper itself performs SECDED.
2.2. If INJECT_TYPE = 0 and the ECC wrapper fails,
-Does the IP fabric automatically take over SECDED for that RAM ID?

Thanks in advance,
Anber

  • Hi Anber,

    1.In the SDL, the SDL_ECC_aggrTable (ECC Aggregator, sdl_ecc_soc.h) together with the sub‑region definitions in sdl_soc_ecc_aggr.h provide the RAM IDs, each with an ACCESSIBLE property,
    for example:
    Code:
    #define SDL_MCU_R5FSS0_CORE0_ECC_AGGR_CPU0_DDATA_RAM1_ACCESSIBLE     (1U)
    #define SDL_MCU_R5FSS0_CORE0_ECC_AGGR_MEM_MST0_KSBUS_AXI2VBUSM_R_EDC_CTRL_ACCESSIBLE  (0U)

    -What is the meaning of the ACCESSIBLE flag in this context?

    Value

    Meaning

    1U (ACCESSIBLE)

    The RAM's data content is directly readable/writable by software.

    0U (NOT ACCESSIBLE)

    The RAM's data content is NOT directly accessible by software (e.g., it is an internal micro-architectural buffer, a cache, or a bus-side SRAM owned exclusively by the IP).


    2. According to the SDL documentation:

    2.1. INJECT_TYPE
    2.1.1. INJECT_TYPE = 1 → the ECC wrapper operates in inject‑only mode; the IP fabric performs SECDED.
    2.1.2. NJECT_TYPE = 0 → the ECC wrapper itself performs SECDED.
    2.2. If INJECT_TYPE = 0 and the ECC wrapper fails,
    -Does the IP fabric automatically take over SECDED for that RAM ID?

    Please refer to this FAQ - [FAQ] TDA4VM: Types of ECC Aggregators, RAM IDs and Error Injection

    Regards,

    Josiitaa

  • Hi Jositaa,
    Follow up questions:

    1. For ECC‑protected regions (SEC‑DED):
    1.1. INJECT_TYPE = 0 → the ECC Wrapper performs SECDED
    1.2. INJECT_TYPE = 1 → the IP Fabric performs SECDED

    Can you please confirm whether the ECC wrapper or the IP-fabric ECC logic constitutes a single point of failure in the event of an internal malfunction?

    2.0 Does the SoC:
    2.1. provide a redundant correction path or a fallback mechanism? 
    2.2. monitor any of the following: the ECC Wrapper or the IP Fabric?

    Thanks in advance,

    Anber