AM62A3: When receiving MIPI data, the MIPI CSI-2 on AM62A3 occasionally encounters a DMA TR EXCEPTION error.

When the CPPI5_TR_RESPONSE_STATUS_TRANSFER_EXCEPTION is 5, which means CSL_BCDMA_TR_RESPONSE_STATUS_UNSUPPORTED_ELTYPE happened. Generally, the type we can support from 0-11. 

typedef uint32_t CSL_UdmapTrFmtflagsEltype;
/* 1 Byte per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_1           ((uint32_t) 0U)
/* 1.5 Bytes (12 bits) per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_1p5         ((uint32_t) 1U)
/* 2 Bytes per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_2           ((uint32_t) 2U)
/* 3 Bytes per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_3           ((uint32_t) 3U)
/* 4 Bytes per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_4           ((uint32_t) 4U)
/* 5 Bytes per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_5           ((uint32_t) 5U)
/* 16 Bytes per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_16          ((uint32_t) 6U)
/* 32 Bytes per element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_32          ((uint32_t) 7U)
/* 1 Byte per input element 2 Bytes per output element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_1_2         ((uint32_t) 8U)
/* 1.5 Bytes per input element 2 Bytes per output element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_1p5_2       ((uint32_t) 9U)
/* 2 Bytes per input element 1 Byte per output element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_2_1         ((uint32_t) 10U)
/* 2 Bytes per input element 1.5 Bytes per output element */
#define CSL_UDMAP_TR_FMTFLAGS_ELYPE_2_1p5       ((uint32_t) 11U)

Could you please check why the TR data isn't correct? Any data crash happens?

Hi Lion,

Can you please share the following information first:

1. media-ctl -p output. I want to understand why there is no format present on the csi2rx.
2. What changes you have made on top of the CSI drivers in the kernel.
3. The device tree overlay that you are using with the sensor.
4. Are you running a custom application? Does this issue come up when streaming using yavta or v4l2-ctl as well?

Adding prints inside the driver every frame is also something that can cause latency spikes. Typically, those should be avoided.

Please keep in mind that this is a public forum.

Regards,
Jay

Hi Jay,

1. Here is the media-ctl -p output

2. Here is the diff file

diff --git a/ti-linux-kernel-6.12.35+git-ti-rt/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/ti-linux-kernel-6.12.35+git-ti-rt/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
index 915516410..cfb6753af 100644
--- a/ti-linux-kernel-6.12.35+git-ti-rt/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
+++ b/ti-linux-kernel-6.12.35+git-ti-rt/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi
@@ -50,10 +50,9 @@ facet_irqs@0 {
 	};
 
 	csi2rx_err_irqs@0 {
-		status = "okay";
+		status = "disabled";
 		compatible = "generic-uio";
-		// CSI2RX_ERR_IRQ_NUM = 175 （From TI AM62x TRM）
-		// IRQ_NUM - 32 => 175 - 32 => 143
+		/* IRQ now routed to cdns-csi2rx bridge — see cdns_csi2rx0 node. */
 		interrupts = <GIC_SPI 143 IRQ_TYPE_EDGE_RISING>;
 		interrupt-names = "csi2rx_err_irqs";
 		interrupt-parent = <&gic500>;
@@ -1104,6 +1103,14 @@ ti_csi2rx0: ticsi2rx@30102000 {
 		cdns_csi2rx0: csi-bridge@30101000 {
 			compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
 			reg = <0x00 0x30101000 0x00 0x1000>;
+			/*
+			 * CSI2RX_ERR_IRQ_NUM = 175 (AM62x TRM), GIC sees it as
+			 * SPI 143 (= 175 - 32). Routed here (not generic-uio)
+			 * so the cdns driver ISR can push protocol-layer errors
+			 * into the j721e-csi2rx err_tbl for diagnostics.
+			 */
+			interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error_irq";
 			clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
 				<&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
 			clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
diff --git a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/dmaengine.h b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/dmaengine.h
index 53f16d3f0..b719d344d 100644
--- a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/dmaengine.h
+++ b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/dmaengine.h
@@ -134,7 +134,8 @@ dmaengine_desc_callback_invoke(struct dmaengine_desc_callback *cb,
 {
 	struct dmaengine_result dummy_result = {
 		.result = DMA_TRANS_NOERROR,
-		.residue = 0
+		.residue = 0,
+		.status = 0,
 	};
 
 	if (cb->callback_result) {
diff --git a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/ti/k3-udma-common.c b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/ti/k3-udma-common.c
index 415f243aa..2431e263b 100644
--- a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/ti/k3-udma-common.c
+++ b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/dma/ti/k3-udma-common.c
@@ -6,6 +6,7 @@
 
 #include <linux/kernel.h>
 #include <linux/module.h>
+#include <linux/bitfield.h>
 #include <linux/delay.h>
 #include <linux/dmaengine.h>
 #include <linux/dma-mapping.h>
@@ -1969,6 +1970,99 @@ void udma_synchronize(struct dma_chan *chan)
 	udma_reset_rings(uc);
 }
 
+static const char * const udma_tr_resp_status_type_str[] = {
+	[CPPI5_TR_RESPONSE_STATUS_NONE]			= "NONE",
+	[CPPI5_TR_RESPONSE_STATUS_TRANSFER_ERR]		= "TRANSFER_ERR",
+	[CPPI5_TR_RESPONSE_STATUS_ABORTED_ERR]		= "ABORTED_ERR",
+	[CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR]	= "SUBMISSION_ERR",
+	[CPPI5_TR_RESPONSE_STATUS_UNSUPPORTED_ERR]	= "UNSUPPORTED_ERR",
+	[CPPI5_TR_RESPONSE_STATUS_TRANSFER_EXCEPTION]	= "TRANSFER_EXCEPTION",
+	[CPPI5_TR_RESPONSE_STATUS__TEARDOWN_FLUSH]	= "TEARDOWN_FLUSH",
+};
+
+static const char * const udma_tr_resp_submission_info_str[] = {
+	[CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ICNT0]	= "ICNT0 was 0",
+	[CPPI5_TR_RESPONSE_STATUS_SUBMISSION_FIFO_FULL]	= "channel FIFO full",
+	[CPPI5_TR_RESPONSE_STATUS_SUBMISSION_OWN]	= "channel not owned",
+};
+
+static const char *udma_tr_status_type_name(u8 type)
+{
+	if (type < CPPI5_TR_RESPONSE_STATUS_MAX &&
+	    udma_tr_resp_status_type_str[type])
+		return udma_tr_resp_status_type_str[type];
+	return "unknown";
+}
+
+/*
+ * Dump the full TR descriptor contents when the TR response reports an
+ * error, to aid debugging of e.g. submission errors.
+ */
+static void udma_dump_tr_error(struct udma_chan *uc, struct udma_desc *d)
+{
+	struct udma_hwdesc *hwdesc = &d->hwdesc[0];
+	struct cppi5_desc_hdr_t *hdr = hwdesc->cppi5_desc_vaddr;
+	unsigned int tr_count, tr_size, i;
+
+	if (cppi5_desc_get_type(hwdesc->cppi5_desc_vaddr) !=
+	    CPPI5_INFO0_DESC_TYPE_VAL_TR)
+		return;
+
+	tr_count = (hdr->pkt_info0 & CPPI5_INFO0_TRDESC_LASTIDX_MASK) + 1;
+	tr_size = 16 << ((hdr->pkt_info1 & CPPI5_INFO1_TRDESC_RECSIZE_MASK) >>
+			 CPPI5_INFO1_TRDESC_RECSIZE_SHIFT);
+
+	dev_err(uc->ud->dev,
+		"chan%d TR error: dir=%u pkt_mode=%u state=%u terminated=%u tr_count=%u tr_size=%u residue=%u\n",
+		uc->id, uc->config.dir, uc->config.pkt_mode, uc->state,
+		d->terminated, tr_count, tr_size, d->residue);
+
+	for (i = 0; i < tr_count; i++) {
+		struct cppi5_tr_resp_t *resp = &hwdesc->tr_resp_base[i];
+		u8 type = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_TYPE_MASK,
+				    resp->status);
+		u8 info = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_INFO_MASK,
+				    resp->status);
+		const char *info_str = "";
+
+		if (type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR &&
+		    info < CPPI5_TR_RESPONSE_STATUS_SUBMISSION_MAX &&
+		    udma_tr_resp_submission_info_str[info])
+			info_str = udma_tr_resp_submission_info_str[info];
+
+		dev_err(uc->ud->dev,
+			"  resp[%u]: status=0x%02x type=%u(%s) info=%u(%s) cmd_id=0x%02x cfg=0x%02x\n",
+			i, resp->status, type, udma_tr_status_type_name(type),
+			info, info_str, resp->cmd_id, resp->flags);
+	}
+
+	for (i = 0; i < tr_count; i++) {
+		struct cppi5_tr_type0_t *tr =
+			(void *)((u8 *)hwdesc->tr_req_base + i * tr_size);
+
+		if (tr_size == sizeof(struct cppi5_tr_type15_t)) {
+			struct cppi5_tr_type15_t *tr15 = (void *)tr;
+
+			dev_err(uc->ud->dev,
+				"  tr[%u]: type=%u flags=0x%08x icnt=%u,%u,%u,%u addr=0x%llx dim=%d,%d,%d daddr=0x%llx dicnt=%u,%u,%u,%u ddim=%d,%d,%d\n",
+				i, (unsigned int)(tr15->flags &
+						  CPPI5_TR_TYPE_MASK),
+				tr15->flags,
+				tr15->icnt0, tr15->icnt1, tr15->icnt2,
+				tr15->icnt3, tr15->addr, tr15->dim1, tr15->dim2,
+				tr15->dim3, tr15->daddr, tr15->dicnt0,
+				tr15->dicnt1, tr15->dicnt2, tr15->dicnt3,
+				tr15->ddim1, tr15->ddim2, tr15->ddim3);
+		} else {
+			dev_err(uc->ud->dev,
+				"  tr[%u]: type=%u flags=0x%08x icnt0=%u addr=0x%llx\n",
+				i, (unsigned int)(tr->flags &
+						  CPPI5_TR_TYPE_MASK), tr->flags,
+				tr->icnt0, tr->addr);
+		}
+	}
+}
+
 void udma_desc_pre_callback(struct virt_dma_chan *vc,
 				   struct virt_dma_desc *vd,
 				   struct dmaengine_result *result)
@@ -1997,14 +2091,18 @@ void udma_desc_pre_callback(struct virt_dma_chan *vc,
 				result->result = DMA_TRANS_ABORTED;
 			else
 				result->result = DMA_TRANS_NOERROR;
+			result->status = 0;
 		} else {
 			result->residue = 0;
 			/* Propagate TR Response errors to the client */
 			status = d->hwdesc[0].tr_resp_base->status;
-			if (status)
+			result->status = status;
+			if (status) {
 				result->result = DMA_TRANS_ABORTED;
-			else
+				udma_dump_tr_error(uc, d);
+			} else {
 				result->result = DMA_TRANS_NOERROR;
+			}
 		}
 	}
 }
diff --git a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/cadence/cdns-csi2rx.c b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/cadence/cdns-csi2rx.c
index e130c1659..233d5d246 100644
--- a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -7,10 +7,12 @@
 #define DEBUG
 #define VERBOSE_DEBUG
 
+#include <linux/bitfield.h>
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
 #include <linux/iopoll.h>
+#include <linux/ktime.h>
 #include <linux/module.h>
 #include <linux/of.h>
 #include <linux/of_graph.h>
@@ -34,6 +36,12 @@
 #define CSI2RX_STATIC_CFG_DLANE_MAP(llane, plane)	((plane) << (16 + (llane) * 4))
 #define CSI2RX_STATIC_CFG_LANES_MASK			GENMASK(11, 8)
 
+#define CSI2RX_ERROR_BYPASS_CFG_REG		0x010
+#define CSI2RX_ERROR_BYPASS_CRC_EN		BIT(0)
+#define CSI2RX_ERROR_BYPASS_ECC_EN		BIT(1)
+#define CSI2RX_ERROR_BYPASS_DATA_ID_EN	BIT(2)
+#define CSI2RX_ERROR_BYPASS_ALL_EN		GENMASK(2, 0)
+
 #define CSI2RX_DPHY_LANE_CTRL_REG		0x40
 #define CSI2RX_DPHY_CL_RST			BIT(16)
 #define CSI2RX_DPHY_DL_RST(i)			BIT((i) + 12)
@@ -119,6 +127,18 @@ static const struct csi2rx_event csi2rx_events[] = {
 
 #define CSI2RX_NUM_EVENTS		ARRAY_SIZE(csi2rx_events)
 
+struct csi2rx_priv;
+typedef void (*cdns_csi2rx_error_subscriber_t)(struct csi2rx_priv *priv,
+					       u32 irq_status,
+					       ktime_t timestamp,
+					       void *data);
+
+/* Public subscriber API (exported for shim drivers) */
+void cdns_csi2rx_set_error_subscriber(struct v4l2_subdev *subdev,
+				      cdns_csi2rx_error_subscriber_t cb,
+				      void *data);
+void cdns_csi2rx_clear_error_subscriber(struct v4l2_subdev *subdev);
+
 struct csi2rx_priv {
 	struct device			*dev;
 	unsigned int			count;
@@ -155,6 +175,15 @@ struct csi2rx_priv {
 	/* Remote source */
 	struct v4l2_subdev		*source_subdev;
 	int				source_pad;
+
+	/*
+	 * Optional subscriber for protocol-layer error status. A downstream
+	 * driver (typically the TI CSI2RX shim) may register here to get a
+	 * push on every IRQ with the raw ERROR_IRQS register snapshot, BEFORE
+	 * the status register is cleared. NULL = no subscriber.
+	 */
+	cdns_csi2rx_error_subscriber_t	error_subscriber;
+	void				*error_subscriber_data;
 };
 
 static const struct csi2rx_fmt formats[] = {
@@ -218,9 +247,8 @@ static void csi2rx_configure_error_irq_mask(void __iomem *base,
 	writel(error_irq_mask, base + CSI2RX_ERROR_IRQS_MASK_REG);
 }
 
-static irqreturn_t csi2rx_irq_handler(int irq, void *dev_id)
+static u32 csi2rx_clear_error_irqs(struct csi2rx_priv *csi2rx)
 {
-	struct csi2rx_priv *csi2rx = dev_id;
 	int i;
 	u32 error_status;
 
@@ -231,6 +259,25 @@ static irqreturn_t csi2rx_irq_handler(int irq, void *dev_id)
 			csi2rx->events[i]++;
 
 	writel(error_status, csi2rx->base + CSI2RX_ERROR_IRQS_REG);
+	return error_status;
+}
+
+static irqreturn_t csi2rx_irq_handler(int irq, void *dev_id)
+{
+	struct csi2rx_priv *csi2rx = dev_id;
+	u32 error_status;
+	ktime_t ts;
+
+	/*
+	 * Snapshot ktime BEFORE clearing, so the subscriber sees the true
+	 * hardware time, not the time after software work.
+	 */
+	ts = ktime_get();
+	error_status = csi2rx_clear_error_irqs(csi2rx);
+
+	if (csi2rx->error_subscriber && error_status)
+		csi2rx->error_subscriber(csi2rx, error_status, ts,
+					 csi2rx->error_subscriber_data);
 
 	return IRQ_HANDLED;
 }
@@ -280,6 +327,26 @@ struct csi2rx_priv *v4l2_subdev_to_csi2rx(struct v4l2_subdev *subdev)
 	return container_of(subdev, struct csi2rx_priv, subdev);
 }
 
+void cdns_csi2rx_set_error_subscriber(struct v4l2_subdev *subdev,
+					cdns_csi2rx_error_subscriber_t cb,
+					void *data)
+{
+	struct csi2rx_priv *csi2rx = v4l2_subdev_to_csi2rx(subdev);
+
+	csi2rx->error_subscriber = cb;
+	csi2rx->error_subscriber_data = data;
+}
+EXPORT_SYMBOL_GPL(cdns_csi2rx_set_error_subscriber);
+
+void cdns_csi2rx_clear_error_subscriber(struct v4l2_subdev *subdev)
+{
+	struct csi2rx_priv *csi2rx = v4l2_subdev_to_csi2rx(subdev);
+
+	csi2rx->error_subscriber = NULL;
+	csi2rx->error_subscriber_data = NULL;
+}
+EXPORT_SYMBOL_GPL(cdns_csi2rx_clear_error_subscriber);
+
 static void csi2rx_reset(struct csi2rx_priv *csi2rx)
 {
 	unsigned int i;
@@ -397,6 +464,13 @@ static int csi2rx_start(struct csi2rx_priv *csi2rx)
 
 	writel(reg, csi2rx->base + CSI2RX_STATIC_CFG_REG);
 
+	// clear error interrupts
+	csi2rx_clear_error_irqs(csi2rx);
+
+	// enable all error bypasses
+	writel(CSI2RX_ERROR_BYPASS_ALL_EN,
+		csi2rx->base + CSI2RX_ERROR_BYPASS_CFG_REG);
+
 	/* Enable DPHY clk and data lanes. */
 	if (csi2rx->dphy) {
 		reg = CSI2RX_DPHY_CL_EN | CSI2RX_DPHY_CL_RST;
@@ -1146,20 +1220,20 @@ static int csi2rx_probe(struct platform_device *pdev)
 	if (ret)
 		goto err_cleanup;
 
-	// csi2rx->error_irq = platform_get_irq_byname_optional(pdev, "error_irq");
-
-	// if (csi2rx->error_irq < 0) {
-	// 	dev_dbg(csi2rx->dev, "Optional interrupt not defined, proceeding without it\n");
-	// } else {
-	// 	ret = devm_request_irq(csi2rx->dev, csi2rx->error_irq,
-	// 			       csi2rx_irq_handler, 0,
-	// 			       dev_name(&pdev->dev), csi2rx);
-	// 	if (ret) {
-	// 		dev_err(csi2rx->dev,
-	// 			"Unable to request interrupt: %d\n", ret);
-	// 		goto err_cleanup;
-	// 	}
-	// }
+	csi2rx->error_irq = platform_get_irq_byname_optional(pdev, "error_irq");
+
+	if (csi2rx->error_irq < 0) {
+		dev_dbg(csi2rx->dev, "Optional interrupt not defined, proceeding without it\n");
+	} else {
+		ret = devm_request_irq(csi2rx->dev, csi2rx->error_irq,
+				       csi2rx_irq_handler, 0,
+				       dev_name(&pdev->dev), csi2rx);
+		if (ret) {
+			dev_err(csi2rx->dev,
+				"Unable to request interrupt: %d\n", ret);
+			goto err_cleanup;
+		}
+	}
 
 	ret = v4l2_subdev_init_finalize(&csi2rx->subdev);
 	if (ret)
diff --git a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index 595e5d974..004aac7ad 100644
--- a/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/ti-linux-kernel-6.12.35+git-ti-rt/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -12,7 +12,10 @@
 
 #include <linux/bitfield.h>
 #include <linux/dmaengine.h>
+#include <linux/dma/ti-cppi5.h>
 #include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 #include <linux/of_platform.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
@@ -46,6 +49,40 @@
 #define SHIM_PSI_CFG0_SRC_TAG		GENMASK(15, 0)
 #define SHIM_PSI_CFG0_DST_TAG		GENMASK(31, 16)
 
+/*
+ * Mirrors of Cadence CSI-2 RX core registers (cdns-csi2rx.c).
+ * Duplicated here so we can snapshot them from the TI shim driver
+ * on error without crossing driver boundaries at runtime.
+ */
+#define CDNS_CSI2RX_DEVICE_CFG		0x000
+#define CDNS_CSI2RX_STATIC_CFG		0x008
+#define CDNS_CSI2RX_ERROR_IRQS		0x028
+#define CDNS_CSI2RX_ERROR_IRQS_MASK	0x02C
+#define CDNS_CSI2RX_DPHY_LANE_CTRL	0x040
+#define CDNS_CSI2RX_STREAM_CTRL(n)	((((n) + 1) * 0x100) + 0x000)
+#define CDNS_CSI2RX_STREAM_STATUS(n)	((((n) + 1) * 0x100) + 0x004)
+#define CDNS_CSI2RX_STREAM_DATA_CFG(n)	((((n) + 1) * 0x100) + 0x008)
+#define CDNS_CSI2RX_STREAM_CFG(n)	((((n) + 1) * 0x100) + 0x00c)
+
+/*
+ * Indices into csi2rx_err_entry::regs[] — names live side-by-side in
+ * csi2rx_err_reg_names[] for sysfs rendering.
+ */
+enum ti_csi2rx_err_reg_idx {
+	REG_SHIM_CNTL = 0,
+	REG_SHIM_DMACNTX,		/* offset computed from ctx->idx */
+	REG_SHIM_PSI_CFG0,		/* offset computed from ctx->idx */
+	REG_CDNS_STATIC_CFG,
+	REG_CDNS_ERROR_IRQS,
+	REG_CDNS_ERROR_IRQS_MASK,
+	REG_CDNS_DPHY_LANE_CTRL,
+	REG_CDNS_STREAM_CTRL,		/* for stream ctx->stream */
+	REG_CDNS_STREAM_STATUS,
+	REG_CDNS_STREAM_CFG,
+	REG_CDNS_STREAM_DATA_CFG,
+	CSI2RX_ERR_N_REGS
+};
+
 #define TI_CSI2RX_MAX_PIX_PER_CLK	4
 #define PSIL_WORD_SIZE_BYTES		16
 #define TI_CSI2RX_MAX_CTX		32
@@ -67,6 +104,37 @@
 #define DRAIN_BUFFER_SIZE		SZ_32K
 #define DRAIN_TIMEOUT_MS		250
 
+#define CSI2RX_ERR_TBL_SIZE		64
+
+/* Error-record kind discriminator */
+enum ti_csi2rx_err_kind {
+	CSI2RX_ERR_KIND_FRAME,	/* DMA TR error from a normal frame buffer */
+	CSI2RX_ERR_KIND_DRAIN,	/* DMA TR error from the drain DMA path */
+	CSI2RX_ERR_KIND_HW_IRQ,	/* Protocol-layer error from cdns CSI-2 RX ISR */
+};
+
+/* DMA TR error record for debug */
+struct csi2rx_err_entry {
+	s64 timestamp_ns;	/* monotonic clock when callback fired */
+	s64 delta_t1_ns;	/* interval from previous error callback (ns) */
+	s64 delta_t2_ns;	/* interval from two error callbacks ago (ns) */
+	u64 addr;		/* DMA buffer address used for this TR */
+	u32 size_bytes;		/* DMA transfer size for this TR */
+	u32 sequence;		/* frame sequence at error time */
+	u32 stream;		/* CSI stream index (used to pick stream regs) */
+	u32 hw_irq_status;	/* ERROR_IRQS snapshot (only for KIND_HW_IRQ) */
+	u8  kind;		/* enum ti_csi2rx_err_kind */
+	u8  ctx_idx;		/* CSI DMA context index */
+	u8  status;		/* TR Response status byte */
+	u8  status_type;	/* decoded TR Response status type */
+	u8  status_info;	/* decoded TR Response status info */
+	u8  result;		/* dmaengine_tx_result value */
+	u8  dma_state;		/* enum ti_csi2rx_dma_state */
+	u8  n_regs;		/* number of valid entries in regs[] */
+	u32 residue;		/* untransferred bytes */
+	u32 regs[CSI2RX_ERR_N_REGS];	/* snapshot of shim + cdns core regs */
+};
+
 struct ti_csi2rx_fmt {
 	u32				fourcc;	/* Four character code. */
 	u32				code;	/* Mbus code. */
@@ -121,6 +189,13 @@ struct ti_csi2rx_ctx {
 struct ti_csi2rx_dev {
 	struct device			*dev;
 	void __iomem			*shim;
+	/*
+	 * Optional handle to the Cadence CSI-2 RX core registers. Used only
+	 * for read-only diagnostics on error (snapshot of ERROR_IRQS, DPHY
+	 * state, stream status). May be NULL if the cdns node cannot be
+	 * mapped (i.e. on platforms without a sibling cdns,csi2rx).
+	 */
+	void __iomem			*cdns;
 	struct mutex			mutex; /* To serialize ioctls. */
 	unsigned int			enable_count;
 	bool					enable_multi_stream;
@@ -142,6 +217,16 @@ struct ti_csi2rx_dev {
 		size_t			len;
 	} drain;
 	struct completion drain_complete;
+
+	/* DMA TR error/interrupt debug table */
+	struct csi2rx_err_entry	err_tbl[CSI2RX_ERR_TBL_SIZE];
+	u32			err_tbl_head;
+	u32			err_tbl_count;
+	spinlock_t		err_tbl_lock;
+	s64			last_irq_ns;	/* timestamp of last interrupt */
+	s64			prev_irq_ns;	/* timestamp of 2nd-to-last interrupt */
+	s64			last_hw_irq_ns;	/* separate chain for hw-irq kind */
+	s64			prev_hw_irq_ns;
 };
 
 static const struct ti_csi2rx_fmt ti_csi2rx_formats[] = {
@@ -334,7 +419,17 @@ static const struct ti_csi2rx_fmt ti_csi2rx_formats[] = {
 extern int cdns_csi2rx_negotiate_ppc(struct v4l2_subdev *subdev,
 				     unsigned int pad, u8 *ppc);
 
-/* Forward declaration needed by ti_csi2rx_dma_callback. */
+struct csi2rx_priv;
+typedef void (*cdns_csi2rx_error_subscriber_t)(struct csi2rx_priv *priv,
+					       u32 irq_status,
+					       ktime_t timestamp,
+					       void *data);
+extern void cdns_csi2rx_set_error_subscriber(struct v4l2_subdev *subdev,
+					     cdns_csi2rx_error_subscriber_t cb,
+					     void *data);
+extern void cdns_csi2rx_clear_error_subscriber(struct v4l2_subdev *subdev);
+
+/* Forward declarations needed by ti_csi2rx_dma_callback_result. */
 static int ti_csi2rx_start_dma(struct ti_csi2rx_ctx *ctx,
 			       struct ti_csi2rx_buffer *buf);
 
@@ -342,6 +437,151 @@ static int ti_csi2rx_start_dma(struct ti_csi2rx_ctx *ctx,
 static int ti_csi2rx_drain_dma(struct ti_csi2rx_ctx *ctx);
 static int ti_csi2rx_dma_submit_pending(struct ti_csi2rx_ctx *ctx);
 
+static void ti_csi2rx_snapshot_regs(struct ti_csi2rx_dev *csi, u32 ctx_idx,
+				    u32 stream_idx, u32 *regs)
+{
+	regs[REG_SHIM_CNTL]           = readl(csi->shim + SHIM_CNTL);
+	regs[REG_SHIM_DMACNTX]        = readl(csi->shim + SHIM_DMACNTX(ctx_idx));
+	regs[REG_SHIM_PSI_CFG0]       = readl(csi->shim + SHIM_PSI_CFG0(ctx_idx));
+
+	if (csi->cdns) {
+		regs[REG_CDNS_STATIC_CFG]      = readl(csi->cdns + CDNS_CSI2RX_STATIC_CFG);
+		regs[REG_CDNS_ERROR_IRQS]      = readl(csi->cdns + CDNS_CSI2RX_ERROR_IRQS);
+		regs[REG_CDNS_ERROR_IRQS_MASK] = readl(csi->cdns + CDNS_CSI2RX_ERROR_IRQS_MASK);
+		regs[REG_CDNS_DPHY_LANE_CTRL]  = readl(csi->cdns + CDNS_CSI2RX_DPHY_LANE_CTRL);
+		regs[REG_CDNS_STREAM_CTRL]     = readl(csi->cdns + CDNS_CSI2RX_STREAM_CTRL(stream_idx));
+		regs[REG_CDNS_STREAM_STATUS]   = readl(csi->cdns + CDNS_CSI2RX_STREAM_STATUS(stream_idx));
+		regs[REG_CDNS_STREAM_CFG]      = readl(csi->cdns + CDNS_CSI2RX_STREAM_CFG(stream_idx));
+		regs[REG_CDNS_STREAM_DATA_CFG] = readl(csi->cdns + CDNS_CSI2RX_STREAM_DATA_CFG(stream_idx));
+	} else {
+		regs[REG_CDNS_STATIC_CFG]      = 0xffffffff;
+		regs[REG_CDNS_ERROR_IRQS]      = 0xffffffff;
+		regs[REG_CDNS_ERROR_IRQS_MASK] = 0xffffffff;
+		regs[REG_CDNS_DPHY_LANE_CTRL]  = 0xffffffff;
+		regs[REG_CDNS_STREAM_CTRL]     = 0xffffffff;
+		regs[REG_CDNS_STREAM_STATUS]   = 0xffffffff;
+		regs[REG_CDNS_STREAM_CFG]      = 0xffffffff;
+		regs[REG_CDNS_STREAM_DATA_CFG] = 0xffffffff;
+	}
+}
+
+/*
+ * Push-callback from the cadence CSI-2 RX ISR. Runs in hard-IRQ context.
+ * Records the protocol-layer error bitmap (which was about to be W1C'd
+ * by the cadence driver) into our shared err_tbl.
+ */
+static void ti_csi2rx_hw_irq_callback(struct csi2rx_priv *priv,
+				      u32 irq_status, ktime_t timestamp,
+				      void *data)
+{
+	struct ti_csi2rx_dev *csi = data;
+	struct csi2rx_err_entry *entry;
+	unsigned long flags;
+	s64 now, dt1, dt2, prev, last;
+
+	now = ktime_to_ns(timestamp);
+
+	spin_lock_irqsave(&csi->err_tbl_lock, flags);
+	prev = csi->prev_hw_irq_ns;
+	last = csi->last_hw_irq_ns;
+	entry = &csi->err_tbl[csi->err_tbl_head];
+	csi->err_tbl_head = (csi->err_tbl_head + 1) % CSI2RX_ERR_TBL_SIZE;
+	if (csi->err_tbl_count < CSI2RX_ERR_TBL_SIZE)
+		csi->err_tbl_count++;
+	csi->prev_hw_irq_ns = last;
+	csi->last_hw_irq_ns = now;
+	dt1 = last ? (now - last) : 0;
+	dt2 = prev ? (last - prev) : 0;
+
+	entry->kind           = CSI2RX_ERR_KIND_HW_IRQ;
+	entry->hw_irq_status  = irq_status;
+	entry->timestamp_ns   = now;
+	entry->delta_t1_ns    = dt1;
+	entry->delta_t2_ns    = dt2;
+	entry->ctx_idx        = 0xff;
+	entry->stream         = 0xff;
+	entry->sequence       = 0;
+	entry->addr           = 0;
+	entry->size_bytes     = 0;
+	entry->status         = 0;
+	entry->status_type    = 0;
+	entry->status_info    = 0;
+	entry->result         = 0;
+	entry->dma_state      = 0;
+	entry->residue        = 0;
+
+	ti_csi2rx_snapshot_regs(csi, 0, 0, entry->regs);
+	entry->n_regs         = CSI2RX_ERR_N_REGS;
+
+	spin_unlock_irqrestore(&csi->err_tbl_lock, flags);
+}
+
+static void ti_csi2rx_record_err(struct ti_csi2rx_ctx *ctx,
+				 const struct dmaengine_result *result,
+				 dma_addr_t addr, u32 size_bytes,
+				 enum ti_csi2rx_err_kind kind)
+{
+	struct ti_csi2rx_dev *csi = ctx->csi;
+	struct csi2rx_err_entry *entry;
+	unsigned long flags;
+	s64 now, dt1, dt2, prev, last;
+	u32 stream;
+
+	if (!result->status)
+		return;
+
+	now = ktime_get_ns();
+	stream = ctx->stream;
+
+	spin_lock_irqsave(&csi->err_tbl_lock, flags);
+	prev = csi->prev_irq_ns;
+	last = csi->last_irq_ns;
+	entry = &csi->err_tbl[csi->err_tbl_head];
+	csi->err_tbl_head = (csi->err_tbl_head + 1) % CSI2RX_ERR_TBL_SIZE;
+	if (csi->err_tbl_count < CSI2RX_ERR_TBL_SIZE)
+		csi->err_tbl_count++;
+	csi->prev_irq_ns = last;
+	csi->last_irq_ns = now;
+	dt1 = last ? (now - last) : 0;
+	dt2 = prev ? (last - prev) : 0;
+
+	entry->kind         = kind;
+	entry->hw_irq_status = 0;
+	entry->timestamp_ns = now;
+	entry->delta_t1_ns  = dt1;
+	entry->delta_t2_ns  = dt2;
+	entry->addr         = addr;
+	entry->size_bytes   = size_bytes;
+	entry->sequence     = ctx->sequence;
+	entry->ctx_idx      = ctx->idx;
+	entry->status       = result->status;
+	entry->status_type  = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_TYPE_MASK,
+					result->status);
+	entry->status_info  = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_INFO_MASK,
+					result->status);
+	entry->result       = result->result;
+	entry->dma_state    = ctx->dma.state;
+	entry->residue      = result->residue;
+	ti_csi2rx_snapshot_regs(csi, ctx->idx, stream, entry->regs);
+	entry->n_regs       = CSI2RX_ERR_N_REGS;
+	spin_unlock_irqrestore(&csi->err_tbl_lock, flags);
+}
+
+/* Decode the status info field for TR submission errors */
+static const char *ti_csi2rx_submission_err_str(u8 info)
+{
+	switch (info) {
+	case CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ICNT0:
+		return "ICNT0 was 0";
+	case CPPI5_TR_RESPONSE_STATUS_SUBMISSION_FIFO_FULL:
+		return "channel FIFO full";
+	case CPPI5_TR_RESPONSE_STATUS_SUBMISSION_OWN:
+		return "channel not owned";
+	default:
+		return "unknown";
+	}
+}
+
 static const struct ti_csi2rx_fmt *find_format_by_fourcc(u32 pixelformat)
 {
 	unsigned int i;
@@ -545,6 +785,13 @@ static int csi_async_notifier_complete(struct v4l2_async_notifier *notifier)
 	if (ret)
 		return ret;
 
+	/*
+	 * Subscribe to protocol-layer errors from the cdns CSI-2 RX core.
+	 * The source subdev here IS the cdns CSI-2 RX bridge.
+	 */
+	cdns_csi2rx_set_error_subscriber(csi->source,
+					 ti_csi2rx_hw_irq_callback, csi);
+
 	/* Create and link video nodes for all DMA contexts */
 	for (i = 0; i < csi->num_ctx; i++) {
 		struct ti_csi2rx_ctx *ctx = &csi->ctx[i];
@@ -741,6 +988,41 @@ static void ti_csi2rx_drain_callback(void *param)
 	spin_unlock_irqrestore(&dma->lock, flags);
 }
 
+/*
+ * Drain transfers use this result-aware callback so that TR errors on the
+ * drain path (which otherwise go unnoticed) are logged, then the normal
+ * drain handling runs unchanged.
+ */
+static void ti_csi2rx_drain_callback_result(void *param,
+					    const struct dmaengine_result *result)
+{
+	struct ti_csi2rx_ctx *ctx = param;
+
+	if (result)
+		ti_csi2rx_record_err(ctx, result, ctx->csi->drain.paddr,
+				     ctx->csi->drain.len, CSI2RX_ERR_KIND_DRAIN);
+
+	if (result &&
+	    (result->result != DMA_TRANS_NOERROR || result->residue)) {
+		u8 type = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_TYPE_MASK,
+				    result->status);
+		u8 info = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_INFO_MASK,
+				    result->status);
+
+		dev_err(ctx->csi->dev,
+			"DMA drain TR error ctx %u: result=%u status=0x%02x (type=%u info=%u%s%s) residue=%u\n",
+			ctx->idx, result->result, result->status,
+			type, info,
+			type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR ?
+				" " : "",
+			type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR ?
+				ti_csi2rx_submission_err_str(info) : "",
+			result->residue);
+	}
+
+	ti_csi2rx_drain_callback(param);
+}
+
 /*
  * Drain the stale data left at the PSI-L endpoint.
  *
@@ -767,7 +1049,7 @@ static int ti_csi2rx_drain_dma(struct ti_csi2rx_ctx *ctx)
 		goto out;
 	}
 
-	desc->callback = ti_csi2rx_drain_callback;
+	desc->callback_result = ti_csi2rx_drain_callback_result;
 	desc->callback_param = ctx;
 
 	cookie = dmaengine_submit(desc);
@@ -802,25 +1084,82 @@ static int ti_csi2rx_dma_submit_pending(struct ti_csi2rx_ctx *ctx)
 	return ret;
 }
 
-static void ti_csi2rx_dma_callback(void *param)
+static void ti_csi2rx_dma_callback_result(void *param,
+					  const struct dmaengine_result *result)
 {
 	struct ti_csi2rx_buffer *buf = param;
 	struct ti_csi2rx_ctx *ctx = buf->ctx;
 	struct ti_csi2rx_dma *dma = &ctx->dma;
+	struct dmaengine_result ok_result = {
+		.result = DMA_TRANS_NOERROR,
+		.residue = 0,
+		.status = 0,
+	};
 	unsigned long flags;
+	enum vb2_buffer_state state = VB2_BUF_STATE_DONE;
+	bool drop_buf = false;
+
+	if (!result)
+		result = &ok_result;
+
+	ti_csi2rx_record_err(ctx, result,
+			     vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0),
+			     ctx->v_fmt.fmt.pix.sizeimage, CSI2RX_ERR_KIND_FRAME);
+
+	if (result->result != DMA_TRANS_NOERROR || result->residue) {
+		dma_addr_t addr = vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf,
+								0);
+		u8 type = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_TYPE_MASK,
+				    result->status);
+		u8 info = FIELD_GET(CPPI5_TR_RESPONSE_STATUS_INFO_MASK,
+				    result->status);
+		u32 snap[CSI2RX_ERR_N_REGS];
+
+		ti_csi2rx_snapshot_regs(ctx->csi, ctx->idx, ctx->stream, snap);
+
+		dev_err(ctx->csi->dev,
+			"DMA TR error ctx %u stream %u seq %u: result=%u status=0x%02x (type=%u info=%u%s%s) residue=%u sizeimage=%u addr=%pad dma_state=%u err_irqs=0x%08x dphy_lane_ctrl=0x%08x shim_dmacntx=0x%08x stream_status=0x%08x\n",
+			ctx->idx, ctx->stream, ctx->sequence,
+			result->result, result->status,
+			type, info,
+			type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR ?
+				" " : "",
+			type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR ?
+				ti_csi2rx_submission_err_str(info) : "",
+			result->residue,
+			ctx->v_fmt.fmt.pix.sizeimage,
+			&addr, ctx->dma.state,
+			snap[REG_CDNS_ERROR_IRQS],
+			snap[REG_CDNS_DPHY_LANE_CTRL],
+			snap[REG_SHIM_DMACNTX],
+			snap[REG_CDNS_STREAM_STATUS]);
+		ctx->ng_frame_cnt++;
+		if (type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR) {
+			drop_buf = true;
+			dev_warn(ctx->csi->dev,
+				 "Discard invalid frame for ctx %u seq %u and recycle buffer to DMA queue\n",
+				 ctx->idx, ctx->sequence);
+		} else {
+			state = VB2_BUF_STATE_ERROR;
+		}
+	} else {
+		ctx->ok_frame_cnt++;
+	}
 
-	/*
-	 * TODO: Derive the sequence number from the CSI2RX frame number
-	 * hardware monitor registers.
-	 */
-	buf->vb.vb2_buf.timestamp = ktime_get_ns();
-	buf->vb.sequence = ctx->sequence++;
+	if (!drop_buf) {
+		/*
+		 * TODO: Derive the sequence number from the CSI2RX frame number
+		 * hardware monitor registers.
+		 */
+		buf->vb.vb2_buf.timestamp = ktime_get_ns();
+		buf->vb.sequence = ctx->sequence++;
+	}
 
 	spin_lock_irqsave(&dma->lock, flags);
-
 	WARN_ON(!list_is_first(&buf->list, &dma->submitted));
-	vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
 	list_del(&buf->list);
+	if (drop_buf)
+		list_add(&buf->list, &dma->queue);
 
 	ti_csi2rx_dma_submit_pending(ctx);
 
@@ -830,6 +1169,9 @@ static void ti_csi2rx_dma_callback(void *param)
 				"DMA drain failed on one of the transactions\n");
 	}
 	spin_unlock_irqrestore(&dma->lock, flags);
+
+	if (!drop_buf)
+		vb2_buffer_done(&buf->vb.vb2_buf, state);
 }
 
 static int ti_csi2rx_start_dma(struct ti_csi2rx_ctx *ctx,
@@ -848,7 +1190,7 @@ static int ti_csi2rx_start_dma(struct ti_csi2rx_ctx *ctx,
 	if (!desc)
 		return -EIO;
 
-	desc->callback = ti_csi2rx_dma_callback;
+	desc->callback_result = ti_csi2rx_dma_callback_result;
 	desc->callback_param = buf;
 
 	cookie = dmaengine_submit(desc);
@@ -1013,7 +1355,7 @@ static int ti_csi2rx_start_streaming(struct vb2_queue *vq, unsigned int count)
 		ret = -EIO;
 	spin_unlock_irqrestore(&dma->lock, flags);
 	if (ret)
-		return ret;
+		goto err;
 
 	ret = video_device_pipeline_start(&ctx->vdev, &csi->pipe);
 	if (ret)
@@ -1319,6 +1661,8 @@ static void ti_csi2rx_cleanup_v4l2(struct ti_csi2rx_dev *csi)
 
 static void ti_csi2rx_cleanup_notifier(struct ti_csi2rx_dev *csi)
 {
+	if (csi->source)
+		cdns_csi2rx_clear_error_subscriber(csi->source);
 	v4l2_async_nf_unregister(&csi->notifier);
 	v4l2_async_nf_cleanup(&csi->notifier);
 }
@@ -1736,6 +2080,134 @@ static const struct dev_pm_ops ti_csi2rx_pm_ops = {
 };
 #endif /* CONFIG_PM */
 
+static const char * const csi2rx_err_reg_names[CSI2RX_ERR_N_REGS] = {
+	[REG_SHIM_CNTL]           = "SHIM_CNTL",
+	[REG_SHIM_DMACNTX]        = "SHIM_DMACNTX",
+	[REG_SHIM_PSI_CFG0]       = "SHIM_PSI_CFG0",
+	[REG_CDNS_STATIC_CFG]     = "CDNS_STATIC_CFG",
+	[REG_CDNS_ERROR_IRQS]     = "CDNS_ERROR_IRQS",
+	[REG_CDNS_ERROR_IRQS_MASK]= "CDNS_ERROR_IRQS_MASK",
+	[REG_CDNS_DPHY_LANE_CTRL] = "CDNS_DPHY_LANE_CTRL",
+	[REG_CDNS_STREAM_CTRL]    = "CDNS_STREAM_CTRL",
+	[REG_CDNS_STREAM_STATUS]  = "CDNS_STREAM_STATUS",
+	[REG_CDNS_STREAM_CFG]     = "CDNS_STREAM_CFG",
+	[REG_CDNS_STREAM_DATA_CFG]= "CDNS_STREAM_DATA_CFG",
+};
+
+/*
+ * sysfs: dump the DMA TR error debug table
+ */
+static ssize_t dma_tr_log_show(struct device *dev,
+			       struct device_attribute *attr, char *buf)
+{
+	struct ti_csi2rx_dev *csi = dev_get_drvdata(dev);
+	struct csi2rx_err_entry *snapshot;
+	u32 count, head, start, i;
+	unsigned long flags;
+	int len = 0;
+
+	snapshot = kcalloc(CSI2RX_ERR_TBL_SIZE, sizeof(*snapshot), GFP_KERNEL);
+	if (!snapshot)
+		return scnprintf(buf, PAGE_SIZE, "(oom)\n");
+
+	len += scnprintf(buf + len, PAGE_SIZE - len,
+		"Only entries with non-zero TR response status are recorded.\n");
+
+	spin_lock_irqsave(&csi->err_tbl_lock, flags);
+	count = csi->err_tbl_count;
+	head  = csi->err_tbl_head;
+	memcpy(snapshot, csi->err_tbl, CSI2RX_ERR_TBL_SIZE * sizeof(*snapshot));
+	spin_unlock_irqrestore(&csi->err_tbl_lock, flags);
+
+	if (!count) {
+		len += scnprintf(buf + len, PAGE_SIZE - len, "(empty)\n");
+		goto out;
+	}
+
+	start = (count < CSI2RX_ERR_TBL_SIZE) ? 0 : head;
+
+	for (i = 0; i < count && len < PAGE_SIZE - 1024; i++) {
+		u32 idx = (start + i) % CSI2RX_ERR_TBL_SIZE;
+		struct csi2rx_err_entry *e = &snapshot[idx];
+		const char *info_str = "";
+		const char *kind_str;
+		u32 r;
+
+		switch (e->kind) {
+		case CSI2RX_ERR_KIND_DRAIN:  kind_str = "drain";  break;
+		case CSI2RX_ERR_KIND_HW_IRQ:  kind_str = "hw_irq"; break;
+		default:			  kind_str = "frame";  break;
+		}
+
+		if (e->status_type == CPPI5_TR_RESPONSE_STATUS_SUBMISSION_ERR)
+			info_str = ti_csi2rx_submission_err_str(e->status_info);
+
+		len += scnprintf(buf + len, PAGE_SIZE - len,
+			"[%u] kind=%s ctx=%u stream=%u seq=%u ts=%lld dt1=%lld dt2=%lld\n",
+			i, kind_str,
+			e->ctx_idx, e->stream, e->sequence,
+			e->timestamp_ns,
+			e->delta_t1_ns,
+			e->delta_t2_ns);
+
+		if (e->kind == CSI2RX_ERR_KIND_HW_IRQ) {
+			len += scnprintf(buf + len, PAGE_SIZE - len,
+				"    hw_irq_status=0x%08x\n", e->hw_irq_status);
+		} else {
+			len += scnprintf(buf + len, PAGE_SIZE - len,
+				"    status=0x%02x type=%u info=%u(%s) result=%u residue=%u addr=0x%llx bytes=%u dma_state=%u\n",
+				e->status, e->status_type, e->status_info, info_str,
+				e->result, e->residue, e->addr, e->size_bytes,
+				e->dma_state);
+		}
+		if (e->n_regs) {
+			len += scnprintf(buf + len, PAGE_SIZE - len, "    regs:");
+			for (r = 0; r < e->n_regs && r < CSI2RX_ERR_N_REGS; r++)
+				len += scnprintf(buf + len, PAGE_SIZE - len,
+						 " %s=0x%08x",
+						 csi2rx_err_reg_names[r],
+						 e->regs[r]);
+			len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
+		}
+	}
+
+out:
+	kfree(snapshot);
+	return len;
+}
+static DEVICE_ATTR_RO(dma_tr_log);
+
+static ssize_t dma_tr_log_clear_store(struct device *dev,
+				      struct device_attribute *attr,
+				      const char *buf, size_t count)
+{
+	struct ti_csi2rx_dev *csi = dev_get_drvdata(dev);
+	unsigned long flags;
+
+	spin_lock_irqsave(&csi->err_tbl_lock, flags);
+	csi->err_tbl_head  = 0;
+	csi->err_tbl_count = 0;
+	csi->last_irq_ns   = 0;
+	csi->prev_irq_ns   = 0;
+	spin_unlock_irqrestore(&csi->err_tbl_lock, flags);
+
+	return count;
+}
+static DEVICE_ATTR_WO(dma_tr_log_clear);
+
+static struct attribute *ti_csi2rx_attrs[] = {
+	&dev_attr_dma_tr_log.attr,
+	&dev_attr_dma_tr_log_clear.attr,
+	NULL,
+};
+static const struct attribute_group ti_csi2rx_attr_group = {
+	.attrs = ti_csi2rx_attrs,
+};
+static const struct attribute_group *ti_csi2rx_attr_groups[] = {
+	&ti_csi2rx_attr_group,
+	NULL,
+};
+
 static int ti_csi2rx_probe(struct platform_device *pdev)
 {
 	struct device_node *np = pdev->dev.of_node;
@@ -1755,6 +2227,28 @@ static int ti_csi2rx_probe(struct platform_device *pdev)
 		return ret;
 	}
 
+	/*
+	 * Try to map the sibling Cadence CSI-2 RX core registers for error
+	 * diagnostics. Failure here is non-fatal — we just skip core reg
+	 * snapshots and keep going with shim-only dumps.
+	 */
+	{
+		struct device_node *cdns_np;
+
+		cdns_np = of_find_compatible_node(NULL, NULL, "cdns,csi2rx");
+		if (cdns_np) {
+			csi->cdns = of_iomap(cdns_np, 0);
+			if (!csi->cdns)
+				dev_warn(csi->dev,
+					 "Failed to map cdns,csi2rx core for diagnostics\n");
+			else
+				dev_info(csi->dev,
+					 "Mapped cdns,csi2rx core at %pOF for error diagnostics\n",
+					 cdns_np);
+			of_node_put(cdns_np);
+		}
+	}
+
 	csi->drain.len = DRAIN_BUFFER_SIZE;
 	csi->drain.vaddr = dma_alloc_coherent(csi->dev, csi->drain.len,
 					      &csi->drain.paddr,
@@ -1779,6 +2273,13 @@ static int ti_csi2rx_probe(struct platform_device *pdev)
 	}
 
 	mutex_init(&csi->mutex);
+	spin_lock_init(&csi->err_tbl_lock);
+
+	ret = devm_device_add_group(csi->dev, ti_csi2rx_attr_groups[0]);
+	if (ret) {
+		dev_err(csi->dev, "Failed to add sysfs group: %d\n", ret);
+		goto err_v4l2;
+	}
 
 	ret = ti_csi2rx_v4l2_init(csi);
 	if (ret)
@@ -1826,6 +2327,8 @@ static int ti_csi2rx_probe(struct platform_device *pdev)
 	mutex_destroy(&csi->mutex);
 	dma_free_coherent(csi->dev, csi->drain.len, csi->drain.vaddr,
 			  csi->drain.paddr);
+	if (csi->cdns)
+		iounmap(csi->cdns);
 	return ret;
 }
 
@@ -1843,6 +2346,8 @@ static void ti_csi2rx_remove(struct platform_device *pdev)
 	mutex_destroy(&csi->mutex);
 	dma_free_coherent(csi->dev, csi->drain.len, csi->drain.vaddr,
 			  csi->drain.paddr);
+	if (csi->cdns)
+		iounmap(csi->cdns);
 
 	pm_runtime_disable(&pdev->dev);
 	pm_runtime_set_suspended(&pdev->dev);
diff --git a/ti-linux-kernel-6.12.35+git-ti-rt/include/linux/dmaengine.h b/ti-linux-kernel-6.12.35+git-ti-rt/include/linux/dmaengine.h
index b137fdb56..38d49455c 100644
--- a/ti-linux-kernel-6.12.35+git-ti-rt/include/linux/dmaengine.h
+++ b/ti-linux-kernel-6.12.35+git-ti-rt/include/linux/dmaengine.h
@@ -552,6 +552,7 @@ enum dmaengine_tx_result {
 struct dmaengine_result {
 	enum dmaengine_tx_result result;
 	u32 residue;
+	u8 status;		/* DMA controller-specific status byte */
 };
 
 typedef void (*dma_async_tx_callback_result)(void *dma_async_param,

3. instead of using dts overlay, we just change the dts directly

seyond_spad_spi: seyond_spad@0 {
	status = "okay";
	compatible = "sony,imx459";
	spi-max-frequency = <15000000>;
	reg = <0>;
	spi-cpol;
	spi-cpha;
	port {
		csi2_seyond_spad: endpoint {
			remote-endpoint = <&csi2rx0_in_sensor>;
			link-frequencies = /bits/ 64 <750000000 40000000>;
			clock-lanes = <0>;
			data-lanes = <1 2 3 4>;
		};
	};
};

&cdns_csi2rx0 {
	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		csi0_port0: port@0 {
			reg = <0>;
			status = "okay";
			csi2rx0_in_sensor: endpoint {
				remote-endpoint = <&csi2_seyond_spad>;
				bus-type = <4>;
				clock-lanes = <0>;
				data-lanes = <1 2 3 4>;
			};
		};
	};
};

4. we use custom application. 

Here is the log messags in last time test

Only entries with non-zero TR response status are recorded.
[0] kind=frame ctx=0 stream=0 seq=39 ts=10337672253 dt1=0 dt2=0
    status=0x05 type=5 info=0() result=3 residue=0 addr=0x99000000 bytes=1075200 dma_state=1
    regs: SHIM_CNTL=0x00000001 SHIM_DMACNTX=0x8020002a SHIM_PSI_CFG0=0x00000000 CDNS_STATIC_CFG=0x43210400 CDNS_ERROR_IRQS=0x00020100 CDNS_ERROR_IRQS_MASK=0x00011ef0 CDNS_DPHY_LANE_CTRL=0x0001f01f CDNS_STREAM_CTRL=0x00000001 CDNS_STREAM_STATUS=0x80000113 CDNS_STREAM_CFG=0x00000120 CDNS_STREAM_DATA_CFG=0x00000000

Hi Lion,

Hi Lion,

I'll add to Linjun's response. A complete list of register dumps:

1. CSIRX_INFO_IRQS - 0x30101020
2. CSIRX_ERROR_IRQS - 0x30101028
3. CSIRX_DPHY_STATUS - 0x30101048
4. CSIRX_DPHY_ERR_STATUS_IRQ - 0x3010104C
5. CSIRX_DPHY_ERR_IRQ_MASK_CFG - 0x30101050
6. CSIRX_STREAM0_STATUS - 0x30101104

Regards,
Jay

Hi Jay,

I will add code to dump these regs and reproduce this issue again

Regards,

Lion

Hi Lion,

Please note that the DMA expert is out of office till mid of next week. I'll try to debug from a CSI standpoint till then. They will help you if the issue is with the DMA configuration.

Regards,
Jay

Hi Jay,

got it.

btw, we have reproduced the issue, here is the regs dump

[0] kind=frame ctx=0 stream=0 seq=87801 ts=2204334600368 dt1=0 dt2=0
status=0x05 type=5 info=0() result=3 residue=0 addr=0x98400000 bytes=1075200 dma_state=1
regs: SHIM_CNTL=0x00000001 SHIM_DMACNTX=0x8020002a
SHIM_PSI_CFG0=0x00000000
CDNS_STATIC_CFG=0x43210400
CDNS_INFO_IRQS=0x00000002
CDNS_ERROR_IRQS=0x00020100
CDNS_ERROR_IRQS_MASK=0x00011ef0
CDNS_DPHY_LANE_CTRL=0x0001f01f
CDNS_DPHY_STATUS=0x00333306
CDNS_DPHY_ERR_STATUS_IRQ=0x00000000
CDNS_DPHY_ERR_IRQ_MASK_CFG=0x00000000
CDNS_STREAM_CTRL=0x00000001
CDNS_STREAM_STATUS=0x80000113
CDNS_STREAM_CFG=0x00000120
CDNS_STREAM_DATA_CFG=0x00000000

Regards,

Lion

Lion,

  If the register dump was captured when the issue happened, regarding the CDNS_DPHY_ERR_STATUS_IRQ=0x00000000, I can't   identify if the error occurred in the DPHY.
  I checked the log again and found: "Skipping validation as no format present on "30102000.ticsirx":2:0..."
  Have you set the set-fmt-video format to the device?

  Thanks.

Linjun 

Hi Jay,

  I compared the code of k3-udma-common.c between ti-linux-kernel-6.12.57 and ti-linux-kernel-6.12.35, and there is an update to the function udma_get_tr_counters. Could you please help check if we need to apply this update?

  Thanks. 

Linjun

Hi Lion,

The only concerning thing that I see from the register dump is INVALID_ACCESS IRQ being triggered. Can you please tell me which driver you have modified for getting the logs?

I also see that you are enabling error bypass on the CSI2RX. Is there a reason for doing this? You are also coupling the drivers by exposing the functionality of one in the other. This is also something that should be avoided, unless there is a good reason to do this.

Linjun,

Typically, pulling in newer changes is a good thing. But since I am not aware about DMA driver's working, I can not comment about this. I would wait for the DMA expert to be back.

Regards,
Jay

Hi Jay，

The customer updated to patch f35d6babd47c31439e64ab73b6ff9faeaf582553 (patch), and the TR issue was fixed. However, feedback shows that every 6000 frames, there is 1 frame with outdated data.  Could you please provide suggestion how to fix the issue?

And they observed  CDNS_ERROR_IRQS=0x00020100  , that means stream1 overflow happened. but they only  enabled stream0. Any suggestion to us ?

Thanks.

Regards,

Linjun

Hi Linjun,

Stream1 Overflow is not something that we should be concerned about. Since we don't pull data from that FIFO, it is expected to go into an error state.

Jay Goyal said:

The only concerning thing that I see from the register dump is INVALID_ACCESS IRQ being triggered. Can you please tell me which driver you have modified for getting the logs?

As I have said before, I am concerned about the INVALID_ACCESS IRQ being triggered. As per the IP documentation, it is supposed to happen when configuration registers are accessed when such changes are not permitted. These might be happening because there are a lot of driver modifications being done, as I pointed to in my previous reply as well.

Jay Goyal said:

I also see that you are enabling error bypass on the CSI2RX. Is there a reason for doing this? You are also coupling the drivers by exposing the functionality of one in the other. This is also something that should be avoided, unless there is a good reason to do this.

Please let me know about the test setup for this. As in, is it just a camera that is constantly streaming? If yes, please let me know why so many changes are made to the UDMA, CSI2RX and SHIM drivers. Otherwise, please let me know about the test setup so that we can determine the best course of action to support that.

Regards,
Jay

After syncing over call, action items:

1. TI to share the list of DMA registers to be captured when the issue occurs.
2. Customer to check if the issue occurs with an application that just queues and dequeues buffers from the driver.
3. TI to share a patch to get kernel logs for DMA Drain being scheduled. Customer to apply the patch, and share dmesg logs.

Regards,
Jay

Hi Lion, Linjun,

Can you please read these registers at the same time you see the bad frame?

DMA channel registers (please read all 6, we will check which one is active):
- Channel 0: STATUS0=0x4E180040, STATUS1=0x4E180044, BCNT=0x4E180408, SBCNT=0x4E180410
- Channel 1: STATUS0=0x4E181040, STATUS1=0x4E181044, BCNT=0x4E181408, SBCNT=0x4E181410
- Channel 2: STATUS0=0x4E182040, STATUS1=0x4E182044, BCNT=0x4E182408, SBCNT=0x4E182410
- Channel 3: STATUS0=0x4E183040, STATUS1=0x4E183044, BCNT=0x4E183408, SBCNT=0x4E183410
- Channel 4: STATUS0=0x4E184040, STATUS1=0x4E184044, BCNT=0x4E184408, SBCNT=0x4E184410
- Channel 5: STATUS0=0x4E185040, STATUS1=0x4E185044, BCNT=0x4E185408, SBCNT=0x4E185410

Ring registers (same 6 channels):
- Channel 0: FOCC=0x4E100018, ROCC=0x4E101018
- Channel 1: FOCC=0x4E102018, ROCC=0x4E103018
- Channel 2: FOCC=0x4E104018, ROCC=0x4E105018
- Channel 3: FOCC=0x4E106018, ROCC=0x4E107018
- Channel 4: FOCC=0x4E108018, ROCC=0x4E109018
- Channel 5: FOCC=0x4E10A018, ROCC=0x4E10B018

CSI RX / SHIM:
- CSIRX_INFO_IRQS: 0x30101020
- CSIRX_ERROR_IRQS: 0x30101028
- CSIRX_ERROR_IRQS_MASK: 0x3010102C
- CSIRX_STATIC_CFG: 0x30101008
- CSIRX_DPHY_LANE_CTRL: 0x30101040
- CSIRX_DPHY_STATUS: 0x30101048
- CSIRX_DPHY_ERR_STATUS_IRQ: 0x3010104C
- CSIRX_DPHY_ERR_IRQ_MASK_CFG: 0x30101050
- STREAM0_CTRL: 0x30101100
- STREAM0_STATUS: 0x30101104
- STREAM0_CFG: 0x3010110C
- STREAM1_CTRL: 0x30101200
- STREAM1_STATUS: 0x30101204
- STREAM1_CFG: 0x3010120C
- SHIM_CNTL: 0x30102010
- SHIM_DMACNTX(0): 0x30102020

Thank you.

Best regards,
Kartheek

Hi Linjun,

Please check if the CSI2RX driver is entering the ti_csi2rx_drain_dma function. A minor patch that logs whenever the function is called is attached.

Regards,
Jay

diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index f910c1502d87..719413ab9953 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -746,6 +746,8 @@ static int ti_csi2rx_drain_dma(struct ti_csi2rx_ctx *ctx)
 	dma_cookie_t cookie;
 	int ret;
 
+	dev_err(ctx->csi->dev, "Scheduling DMA Drain Transaction\n");
+
 	desc = dmaengine_prep_slave_single(ctx->dma.chan, csi->drain.paddr,
 					   csi->drain.len, DMA_DEV_TO_MEM,
 					   DMA_PREP_INTERRUPT | DMA_CTRL_ACK);

Hi Linjun,

we have reproduced this issue with udma debug on, and here is the dmesg

[    0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[    0.000000] Linux version 6.12.35 (wowk@wowk) (aarch64-oe-linux-gcc (GCC) 13.4.0, GNU ld (GNU Binutils) 2.42.0.20240723) #1 SMP PREEMPT_RT Tue Aug 11 14:36:37 CST 2026
[    0.000000] KASLR disabled due to lack of seed
[    0.000000] Machine model: Texas Instruments AM62A7 SK
[    0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[    0.000000] printk: legacy bootconsole [ns16550a0] enabled
[    0.000000] Reserved memory: created CMA memory pool at 0x0000000097000000, size 64 MiB
[    0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x0000000097000000..0x000000009affffff (65536 KiB) map reusable linux,cma
[    0.000000] OF: reserved mem: 0x0000000091880000..0x000000009307ffff (24576 KiB) nomap non-reusable optee@91880000
[    0.000000] OF: reserved mem: 0x0000000080000000..0x000000008007ffff (512 KiB) nomap non-reusable tfa@80000000
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000095f00000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@95f00000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x0000000095f00000..0x0000000095ffffff (1024 KiB) nomap non-reusable r5f-dma-memory@95f00000
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000095000000, size 15 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@95000000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x0000000095000000..0x0000000095efffff (15360 KiB) nomap non-reusable r5f-dma-memory@95000000
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000094f00000, size 1 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@94f00000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x0000000094f00000..0x0000000094ffffff (1024 KiB) nomap non-reusable r5f-dma-memory@94f00000
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000093100000, size 30 MiB
[    0.000000] OF: reserved mem: initialized node r5f-dma-memory@93100000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x0000000093100000..0x0000000094efffff (30720 KiB) nomap non-reusable r5f-dma-memory@93100000
[    0.000000] Reserved memory: created DMA memory pool at 0x0000000091400000, size 4 MiB
[    0.000000] OF: reserved mem: initialized node ipc-memories@91400000, compatible id shared-dma-pool
[    0.000000] OF: reserved mem: 0x0000000091400000..0x00000000917fffff (4096 KiB) nomap non-reusable ipc-memories@91400000
[    0.000000] NUMA: Faking a node at [mem 0x0000000080000000-0x000000009c70ffff]
[    0.000000] NODE_DATA(0) allocated [mem 0x9c6c6200-0x9c6c88bf]
[    0.000000] Zone ranges:
[    0.000000]   DMA      [mem 0x0000000080000000-0x000000009c70ffff]
[    0.000000]   DMA32    empty
[    0.000000]   Normal   empty
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080000000-0x000000008007ffff]
[    0.000000]   node   0: [mem 0x0000000080080000-0x00000000913fffff]
[    0.000000]   node   0: [mem 0x0000000091400000-0x00000000917fffff]
[    0.000000]   node   0: [mem 0x0000000091800000-0x000000009187ffff]
[    0.000000]   node   0: [mem 0x0000000091880000-0x000000009307ffff]
[    0.000000]   node   0: [mem 0x0000000093080000-0x00000000930fffff]
[    0.000000]   node   0: [mem 0x0000000093100000-0x0000000095ffffff]
[    0.000000]   node   0: [mem 0x0000000096000000-0x000000009c70ffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009c70ffff]
[    0.000000] On node 0, zone DMA: 14576 pages in unavailable ranges
[    0.000000] psci: probing for conduit method from DT.
[    0.000000] psci: PSCIv1.1 detected in firmware.
[    0.000000] psci: Using standard PSCI v0.2 function IDs
[    0.000000] psci: Trusted OS migration not required
[    0.000000] psci: SMC Calling Convention v1.5
[    0.000000] percpu: Embedded 25 pages/cpu s62640 r8192 d31568 u102400
[    0.000000] pcpu-alloc: s62640 r8192 d31568 u102400 alloc=25*4096
[    0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 
[    0.000000] Detected VIPT I-cache on CPU0
[    0.000000] CPU features: detected: GIC system register CPU interface
[    0.000000] CPU features: kernel page table isolation disabled by kernel configuration
[    0.000000] CPU features: detected: ARM erratum 845719
[    0.000000] alternatives: applying boot alternatives
[    0.000000] Kernel command line: earlycon=ns16550a,mmio32,0x02800000 clk_ignore_unused bootflag=0 device_type=.hs_fs bist_result=11223344 secboot_status=0 uio_pdrv_genirq.of_id=generic-uio
[    0.000000] Unknown kernel command line parameters "bootflag=0 device_type=.hs_fs bist_result=11223344 secboot_status=0", will be passed to user space.
[    0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
[    0.000000] Inode-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
[    0.000000] Fallback order for Node 0: 0 
[    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 116496
[    0.000000] Policy zone: DMA
[    0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
[    0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 0MB
[    0.000000] software IO TLB: area num 4.
[    0.000000] software IO TLB: SWIOTLB bounce buffer size roundup to 1MB
[    0.000000] software IO TLB: mapped [mem 0x000000009bc80000-0x000000009bd80000] (1MB)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[    0.000000] rcu: Preemptible hierarchical RCU implementation.
[    0.000000] rcu: 	RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=4.
[    0.000000] rcu: 	RCU_SOFTIRQ processing moved to rcuc kthreads.
[    0.000000] 	No expedited grace period (rcu_normal_after_boot).
[    0.000000] 	Trampoline variant of Tasks RCU enabled.
[    0.000000] 	Tracing variant of Tasks RCU enabled.
[    0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[    0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[    0.000000] RCU Tasks: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[    0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[    0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[    0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[    0.000000] GICv3: 256 SPIs implemented
[    0.000000] GICv3: 0 Extended SPIs implemented
[    0.000000] Root IRQ handler: 0xffff800080010098
[    0.000000] GICv3: GICv3 features: 16 PPIs
[    0.000000] GICv3: GICD_CTRL.DS=0, SCR_EL3.FIQ=1
[    0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001880000
[    0.000000] ITS [mem 0x01820000-0x0182ffff]
[    0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[    0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[    0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80c00000 (flat, esz 8, psz 64K, shr 0)
[    0.000000] ITS: using cache flushing for cmd queue
[    0.000000] GICv3: using LPI property table @0x0000000080440000
[    0.000000] GIC: using cache flushing for LPI property table
[    0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080450000
[    0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[    0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[    0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[    0.000000] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[    0.000453] Console: colour dummy device 80x25
[    0.692885] printk: legacy console [tty0] enabled
[    0.692891] printk: legacy bootconsole [ns16550a0] disabled
[    0.692977] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=200000)
[    0.692987] pid_max: default: 32768 minimum: 301
[    0.693045] LSM: initializing lsm=capability
[    0.693159] Mount-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
[    0.693168] Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
[    0.695458] rcu: Hierarchical SRCU implementation.
[    0.695468] rcu: 	Max phase no-delay instances is 400.
[    0.695735] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
[    0.696183] smp: Bringing up secondary CPUs ...
[    0.705146] Detected VIPT I-cache on CPU1
[    0.705258] GICv3: CPU1: found redistributor 1 region 0:0x00000000018a0000
[    0.705277] GICv3: CPU1: using allocated LPI pending table @0x0000000080460000
[    0.705337] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[    0.714377] Detected VIPT I-cache on CPU2
[    0.714467] GICv3: CPU2: found redistributor 2 region 0:0x00000000018c0000
[    0.714482] GICv3: CPU2: using allocated LPI pending table @0x0000000080470000
[    0.714527] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
[    0.723483] Detected VIPT I-cache on CPU3
[    0.723571] GICv3: CPU3: found redistributor 3 region 0:0x00000000018e0000
[    0.723587] GICv3: CPU3: using allocated LPI pending table @0x0000000080480000
[    0.723627] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
[    0.723748] smp: Brought up 1 node, 4 CPUs
[    0.723755] SMP: Total of 4 processors activated.
[    0.723758] CPU: All CPU(s) started at EL2
[    0.723763] CPU features: detected: 32-bit EL0 Support
[    0.723767] CPU features: detected: CRC32 instructions
[    0.723930] alternatives: applying system-wide alternatives
[    0.724295] Memory: 281212K/465984K available (7040K kernel code, 978K rwdata, 1832K rodata, 1664K init, 449K bss, 112924K reserved, 65536K cma-reserved)
[    0.724960] devtmpfs: initialized
[    0.736739] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[    0.736769] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[    0.739212] 29728 pages in range for non-PLT usage
[    0.739235] 521248 pages in range for PLT usage
[    0.739426] pinctrl core: initialized pinctrl subsystem
[    0.744189] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[    0.745529] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
[    0.745865] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[    0.746145] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[    0.746344] audit: initializing netlink subsys (disabled)
[    0.746579] audit: type=2000 audit(0.744:1): state=initialized audit_enabled=0 res=1
[    0.747197] thermal_sys: Registered thermal governor 'step_wise'
[    0.747203] thermal_sys: Registered thermal governor 'power_allocator'
[    0.747262] cpuidle: using governor ladder
[    0.747299] cpuidle: using governor menu
[    0.747597] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[    0.747694] ASID allocator initialised with 65536 entries
[    0.747912] Serial: AMBA PL011 UART driver
[    0.753015] /bus@f0000/interrupt-controller@1800000: Fixed dependency cycle(s) with /bus@f0000/interrupt-controller@1800000
[    0.763723] /seyond-spad-spi/seyond_spad@0: Fixed dependency cycle(s) with /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000
[    0.764700] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[    0.764711] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[    0.764717] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[    0.764721] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[    0.764725] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[    0.764728] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[    0.764733] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[    0.764736] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[    0.766161] k3-chipinfo 43000014.chipid: Family:AM62AX rev:SR1.0 JTAGID[0x0bb8d02f] Detected
[    0.766831] iommu: Default domain type: Translated
[    0.766839] iommu: DMA domain TLB invalidation policy: strict mode
[    0.767946] mc: Linux media interface: v0.10
[    0.768072] videodev: Linux video capture interface: v2.00
[    0.768104] pps_core: LinuxPPS API ver. 1 registered
[    0.768109] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[    0.768126] PTP clock support registered
[    0.768162] EDAC MC: Ver: 3.0.0
[    0.768460] scmi_core: SCMI protocol bus registered
[    0.770657] clocksource: Switched to clocksource arch_sys_counter
[    0.780106] NET: Registered PF_INET protocol family
[    0.780279] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
[    0.781186] tcp_listen_portaddr_hash hash table entries: 256 (order: 1, 10240 bytes, linear)
[    0.781212] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[    0.781223] TCP established hash table entries: 4096 (order: 3, 32768 bytes, linear)
[    0.781291] TCP bind hash table entries: 4096 (order: 6, 327680 bytes, linear)
[    0.781573] TCP: Hash tables configured (established 4096 bind 4096)
[    0.781842] UDP hash table entries: 256 (order: 2, 24576 bytes, linear)
[    0.781895] UDP-Lite hash table entries: 256 (order: 2, 24576 bytes, linear)
[    0.782133] NET: Registered PF_UNIX/PF_LOCAL protocol family
[    0.782530] Trying to unpack rootfs image as initramfs...
[    0.784187] Initialise system trusted keyrings
[    0.784531] workingset: timestamp_bits=58 max_order=17 bucket_order=0
[    0.784872] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[    0.825198] Key type asymmetric registered
[    0.825223] Asymmetric key parser 'x509' registered
[    0.825373] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 241)
[    0.825390] io scheduler mq-deadline registered
[    0.825397] io scheduler kyber registered
[    0.825427] io scheduler bfq registered
[    0.831032] pinctrl-single f4000.pinctrl: 151 pins, size 604
[    0.839357] Serial: 8250/16550 driver, 12 ports, IRQ sharing enabled
[    0.859040] brd: module loaded
[    0.865431] loop: module loaded
[    0.871500] VFIO - User Level meta-driver version: 0.3
[    0.872624] i2c_dev: i2c /dev entries driver
[    0.876874] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[    0.877788] omap-mailbox 29000000.mailbox: omap mailbox rev 0x66fca100
[    0.878042] omap-mailbox 29010000.mailbox: omap mailbox rev 0x66fca100
[    0.878193] omap-mailbox 29020000.mailbox: omap mailbox rev 0x66fca100
[    0.878275] omap-mailbox 29030000.mailbox: no available mbox devices found
[    0.880558] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 (0,8000003f) counters available
[    0.881502] optee: probing for conduit method.
[    0.881544] optee: revision 4.6 (71785645fa6ce42d)
[    0.898441] optee: dynamic shared memory is enabled
[    0.898871] optee: initialized driver
[    0.900583] GACT probability on
[    0.900614] Mirror/redirect action on
[    0.900765] u32 classifier
[    0.900769]     input device check on
[    0.900771]     Actions configured
[    0.901436] NET: Registered PF_PACKET protocol family
[    0.901452] 8021q: 802.1Q VLAN Support v1.8
[    0.901511] Key type dns_resolver registered
[    0.909722] registered taskstats version 1
[    0.909953] Loading compiled-in X.509 certificates
[    0.919060] Demotion targets for Node 0: null
[    0.925762] ti-sci 44043000.system-controller: ABI: 4.0 (firmware rev 0x000b '11.1.5--v11.01.05 (Fancy Rat)')
[    0.983787] platform 79000000.r5f: configured R5F for remoteproc mode
[    0.984197] platform 79000000.r5f: assigned reserved memory node r5f-dma-memory@95f00000
[    0.984634] remoteproc remoteproc0: 79000000.r5f is available
[    0.997866] sht4x 1-0044: probe with driver sht4x failed with error -121
[    0.997970] omap_i2c 20010000.i2c: bus 1 rev0.12 at 100 kHz
[    0.999491] omap_i2c 20020000.i2c: bus 2 rev0.12 at 100 kHz
[    0.999940] ti-sci-intr 4210000.interrupt-controller: Interrupt Router 5 domain created
[    1.000163] ti-sci-intr bus@f0000:interrupt-controller@a00000: Interrupt Router 3 domain created
[    1.000472] ti-sci-inta 48000000.interrupt-controller: Interrupt Aggregator domain 28 created
[    1.000895] ti-sci-inta 4e0a0000.interrupt-controller: Interrupt Aggregator domain 200 created
[    1.003805] ti-udma 485c0100.dma-controller: Number of rings: 82
[    1.004053] ti-udma 485c0100.dma-controller: ti_sci resource range for bchan: 0:18 | 0:0
[    1.004063] ti-udma 485c0100.dma-controller: ti_sci resource range for tchan: 0:12 | 0:0
[    1.004071] ti-udma 485c0100.dma-controller: ti_sci resource range for rchan: 0:18 | 0:0
[    1.007828] ti-udma 485c0100.dma-controller: Channels: 48 (bchan: 18, tchan: 12, rchan: 18)
[    1.011876] ti-udma 485c0000.dma-controller: Number of rings: 150
[    1.012863] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 0:10 | 0:0
[    1.012877] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 19:8 | 0:0
[    1.012885] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 27:1 | 0:0
[    1.012892] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 28:1 | 0:0
[    1.012900] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 0:10 | 0:0
[    1.012907] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 19:1 | 0:0
[    1.012915] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 20:1 | 0:0
[    1.012922] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 21:1 | 0:0
[    1.012929] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 22:1 | 0:0
[    1.012937] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 23:1 | 0:0
[    1.012944] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 0:10 | 0:0
[    1.012951] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 19:16 | 0:0
[    1.012959] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 35:8 | 0:0
[    1.012966] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 43:8 | 0:0
[    1.012973] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 0:10 | 0:0
[    1.012981] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 19:64 | 0:0
[    1.012988] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 83:8 | 0:0
[    1.012995] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 91:8 | 0:0
[    1.019772] ti-udma 485c0000.dma-controller: Channels: 35 (tchan: 20, rchan: 15)
[    1.023028] ti-udma 4e230000.dma-controller: Number of rings: 6
[    1.023172] ti-udma 4e230000.dma-controller: ti_sci resource range for rchan: 0:6 | 0:0
[    1.024046] ti-udma 4e230000.dma-controller: Channels: 6 (bchan: 0, tchan: 0, rchan: 6)
[    1.026992] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 251, base_baud = 3000000) is a 8250
[    1.027114] printk: legacy console [ttyS2] enabled
[    1.029552] 2820000.serial: ttyS0 at MMIO 0x2820000 (irq = 253, base_baud = 3000000) is a 8250
[    1.031690] ti-udma 485c0100.dma-controller: bcdma_alloc_chan_resources: chan0 as MEM-to-MEM
[    1.033897] spi-nor spi0.0: read_opcode: 0x13
[    1.034072] 10 fixed-partitions partitions found on MTD device fc40000.spi.0
[    1.034086] Creating 10 MTD partitions on "fc40000.spi.0":
[    1.034095] 0x000000000000-0x000000080000 : "sbl"
[    1.035948] 0x000000080000-0x000000380000 : "log"
[    1.037548] 0x000000380000-0x0000003a0000 : "phypattern"
[    1.039204] 0x0000003a0000-0x0000003d0000 : "bootflag-a"
[    1.041137] 0x0000003d0000-0x000000400000 : "bootflag-b"
[    1.042882] 0x000000400000-0x000000480000 : "sbl.backup"
[    1.044534] 0x000000480000-0x0000006c0000 : "mnt"
[    1.046092] 0x0000006c0000-0x000000900000 : "backup"
[    1.047639] 0x000000900000-0x000002480000 : "image-a"
[    1.049447] 0x000002480000-0x000004000000 : "image-b"
[    1.059888] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA01103, cpsw version 0x6BA81103 Ports: 3 quirks:00000006
[    1.060898] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
[    1.093731] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[    1.377704] Freeing initrd memory: 12680K
[    1.378341] remoteproc remoteproc0: powering up 79000000.r5f
[    1.378375] remoteproc remoteproc0: Booting fw image am62a-mcu-r5f0_0-fw, size 186272
[    1.379257] remoteproc remoteproc0: trace buffer: da 0x95000400, len 0x1000
[    1.379734] rproc-virtio rproc-virtio.0.auto: assigned reserved memory node r5f-dma-memory@95f00000
[    1.380391] davinci_mdio 8000f00.mdio: phy[1]: device 8000f00.mdio:01, driver YT8011 Automotive Gigabit Ethernet
[    1.380584] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.5
[    1.380592] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512, Policers 32
[    1.380955] virtio_rpmsg_bus virtio0: rpmsg host is online
[    1.380982] rproc-virtio rproc-virtio.0.auto: registered virtio0 (type 7)
[    1.380991] remoteproc remoteproc0: remote processor 79000000.r5f is now up
[    1.381594] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
[    1.388551] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.388551] udma_tchan_id: 19
[    1.388551] src_thread: 00001013
[    1.388551] dst_thread: 0000c600
[    1.398849] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.398849] udma_tchan_id: 20
[    1.398849] src_thread: 00001014
[    1.398849] dst_thread: 0000c601
[    1.411901] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.411901] udma_tchan_id: 21
[    1.411901] src_thread: 00001015
[    1.411901] dst_thread: 0000c602
[    1.433600] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.433600] udma_tchan_id: 22
[    1.433600] src_thread: 00001016
[    1.433600] dst_thread: 0000c603
[    1.443669] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0xe
[    1.454844] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.454844] udma_tchan_id: 23
[    1.454844] src_thread: 00001017
[    1.454844] dst_thread: 0000c604
[    1.466388] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.466388] udma_tchan_id: 24
[    1.466388] src_thread: 00001018
[    1.466388] dst_thread: 0000c605
[    1.476045] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.476045] udma_tchan_id: 25
[    1.476045] src_thread: 00001019
[    1.476045] dst_thread: 0000c606
[    1.489438] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[    1.489438] udma_tchan_id: 26
[    1.489438] src_thread: 0000101a
[    1.489438] dst_thread: 0000c607
[    1.496305] am65-cpsw-nuss 8000000.ethernet: dump_rx_chn:
[    1.496305] udma_rchan_id: 19
[    1.496305] src_thread: 00004600
[    1.496305] dst_thread: 00001013
[    1.496305] epib: 1
[    1.496305] hdesc_size: 96
[    1.496305] psdata_size: 16
[    1.496305] swdata_size: 16
[    1.496305] flow_id_base: 19
[    1.496305] flow_num: 1
[    1.499816] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 19
[    1.499832] ti-udma 485c0000.dma-controller: get rflow19
[    1.499985] am65-cpsw-nuss 8000000.ethernet: flow19 config done. ready:1
[    1.500818] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.500976] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.500984] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.500994] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501000] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501005] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501011] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501017] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.501023] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501033] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501039] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501044] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501050] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501057] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.501201] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.501207] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501217] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501222] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501228] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501234] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501240] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.501247] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501257] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501262] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501268] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501273] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501280] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.501424] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.501430] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501439] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501445] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501451] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501457] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501462] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.501469] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501479] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501484] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501490] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501495] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501502] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.501665] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.501671] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501680] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501686] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501692] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501697] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501703] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.501710] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501719] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501725] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501730] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501736] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501743] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.501888] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.501894] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501904] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501909] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501915] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501920] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501926] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.501933] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.501942] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.501948] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.501953] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.501959] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.501965] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.502108] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.502114] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502125] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502130] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502136] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502142] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502148] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.502155] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502164] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502170] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502176] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502181] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502188] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.502334] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.502339] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502349] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502355] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502360] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502366] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502371] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.502378] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502388] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502393] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502399] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502404] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502410] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[    1.502553] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[    1.502558] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502568] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502573] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502579] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502585] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502590] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[    1.502597] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502607] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502612] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502618] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502623] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502629] am65-cpsw-nuss 8000000.ethernet: RX reset flow 0 occ_rx 0
[    1.502636] am65-cpsw-nuss 8000000.ethernet: RX reset flow 0 occ_rx_fdq 0
[    1.502798] am65-cpsw-nuss 8000000.ethernet: === dump ===> rxrt dis1
[    1.502804] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502814] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502820] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502826] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502832] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.502842] am65-cpsw-nuss 8000000.ethernet: === dump ===> rxrt dis2
[    1.502847] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[    1.502857] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[    1.502862] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[    1.502868] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[    1.502874] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[    1.505222] j721e-csi2rx 30102000.ticsi2rx: Mapped cdns,csi2rx core at /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000 for error diagnostics
[    1.507960] ti-udma 4e230000.dma-controller: chan0: Remote thread: 0x5000 (DEV_TO_MEM)
[    1.507976] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan0 as DEV-to-MEM
[    1.507986] ti-udma 4e230000.dma-controller: get rflow0
[    1.509260] ti-udma 4e230000.dma-controller: chan1: Remote thread: 0x5001 (DEV_TO_MEM)
[    1.509274] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan1 as DEV-to-MEM
[    1.509283] ti-udma 4e230000.dma-controller: get rflow1
[    1.510302] ti-udma 4e230000.dma-controller: chan2: Remote thread: 0x5002 (DEV_TO_MEM)
[    1.510314] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan2 as DEV-to-MEM
[    1.510321] ti-udma 4e230000.dma-controller: get rflow2
[    1.511297] ti-udma 4e230000.dma-controller: chan3: Remote thread: 0x5003 (DEV_TO_MEM)
[    1.511308] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan3 as DEV-to-MEM
[    1.511315] ti-udma 4e230000.dma-controller: get rflow3
[    1.512269] ti-udma 4e230000.dma-controller: chan4: Remote thread: 0x5004 (DEV_TO_MEM)
[    1.512280] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan4 as DEV-to-MEM
[    1.512287] ti-udma 4e230000.dma-controller: get rflow4
[    1.513105] ti-udma 4e230000.dma-controller: chan5: Remote thread: 0x5005 (DEV_TO_MEM)
[    1.513115] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan5 as DEV-to-MEM
[    1.513123] ti-udma 4e230000.dma-controller: get rflow5
[    1.514121] /seyond-spad-spi/seyond_spad@0: Fixed dependency cycle(s) with /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000
[    1.514318] /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000: Fixed dependency cycle(s) with /seyond-spad-spi/seyond_spad@0
[    1.515507] cdns-csi2rx 30101000.csi-bridge: Probed CSI2RX with 4/4 lanes, 4 streams, external D-PHY
[    1.516432] ti-udma 4e230000.dma-controller: chan0: put rflow0
[    1.516446] ti-udma 4e230000.dma-controller: put rflow0
[    1.516452] ti-udma 4e230000.dma-controller: chan0: put rchan0
[    1.517253] ti-udma 4e230000.dma-controller: chan1: put rflow1
[    1.517265] ti-udma 4e230000.dma-controller: put rflow1
[    1.517270] ti-udma 4e230000.dma-controller: chan1: put rchan1
[    1.517966] ti-udma 4e230000.dma-controller: chan2: put rflow2
[    1.517977] ti-udma 4e230000.dma-controller: put rflow2
[    1.517982] ti-udma 4e230000.dma-controller: chan2: put rchan2
[    1.518705] ti-udma 4e230000.dma-controller: chan3: put rflow3
[    1.518717] ti-udma 4e230000.dma-controller: put rflow3
[    1.518723] ti-udma 4e230000.dma-controller: chan3: put rchan3
[    1.519315] ti-udma 4e230000.dma-controller: chan4: put rflow4
[    1.519325] ti-udma 4e230000.dma-controller: put rflow4
[    1.519330] ti-udma 4e230000.dma-controller: chan4: put rchan4
[    1.520064] ti-udma 4e230000.dma-controller: chan5: put rflow5
[    1.520076] ti-udma 4e230000.dma-controller: put rflow5
[    1.520081] ti-udma 4e230000.dma-controller: chan5: put rchan5
[    1.535765] cdns-csi2rx 30101000.csi-bridge: Bound imx459 spi4.0 pad: 0
[    1.538978] clk: Not disabling unused clocks
[    1.538992] PM: genpd: Disabling unused power domains
[    2.781161] Freeing unused kernel memory: 1664K
[    2.781255] Run /init as init process
[    2.781258]   with arguments:
[    2.781261]     /init
[    2.781263]   with environment:
[    2.781265]     HOME=/
[    2.781267]     TERM=linux
[    2.781270]     bootflag=0
[    2.781272]     device_type=.hs_fs
[    2.781275]     bist_result=11223344
[    2.781277]     secboot_status=0

Hi Linjun,

no log message printed to dmesg log buffer when the issue happend

Have you applied the patch Jay mentioned? How about the register dump Sai Sree Kartheek mentioned?

Hi Linjun,

Here is the registers dump  Sai Sree Kartheek  mentioned

============================================
  DMA / CSI-RX / SHIM Register Dump
  2026-08-13 07:22:14
============================================

========== DMA Channel 0 ==========
  STATUS0                          [0x4E180040] = 0x21800000
  STATUS1                          [0x4E180044] = 0x01000008
  BCNT                             [0x4E180408] = 0xFFF57AC2
  SBCNT                            [0x4E180410] = 0xFFF2F342

========== DMA Channel 1 ==========
  STATUS0                          [0x4E181040] = 0x20000000
  STATUS1                          [0x4E181044] = 0x00000000
  BCNT                             [0x4E181408] = 0x00000000
  SBCNT                            [0x4E181410] = 0x00000000

========== DMA Channel 2 ==========
  STATUS0                          [0x4E182040] = 0x20000000
  STATUS1                          [0x4E182044] = 0x00000000
  BCNT                             [0x4E182408] = 0x00000000
  SBCNT                            [0x4E182410] = 0x00000000

========== DMA Channel 3 ==========
  STATUS0                          [0x4E183040] = 0x20000000
  STATUS1                          [0x4E183044] = 0x00000000
  BCNT                             [0x4E183408] = 0x00000000
  SBCNT                            [0x4E183410] = 0x00000000

========== DMA Channel 4 ==========
  STATUS0                          [0x4E184040] = 0x20000000
  STATUS1                          [0x4E184044] = 0x00000000
  BCNT                             [0x4E184408] = 0x00000000
  SBCNT                            [0x4E184410] = 0x00000000

========== DMA Channel 5 ==========
  STATUS0                          [0x4E185040] = 0x20000000
  STATUS1                          [0x4E185044] = 0x00000000
  BCNT                             [0x4E185408] = 0x00000000
  SBCNT                            [0x4E185410] = 0x00000000

========== Ring Channel 0 ==========
  FOCC                             [0x4E100018] = 0x00000000
  ROCC                             [0x4E101018] = 0x00000000

========== Ring Channel 1 ==========
  FOCC                             [0x4E102018] = 0x00000000
  ROCC                             [0x4E103018] = 0x00000000

========== Ring Channel 2 ==========
  FOCC                             [0x4E104018] = 0x00000000
  ROCC                             [0x4E105018] = 0x00000000

========== Ring Channel 3 ==========
  FOCC                             [0x4E106018] = 0x00000000
  ROCC                             [0x4E107018] = 0x00000000

========== Ring Channel 4 ==========
  FOCC                             [0x4E108018] = 0x00000000
  ROCC                             [0x4E109018] = 0x00000000

========== Ring Channel 5 ==========
  FOCC                             [0x4E10A018] = 0x00000000
  ROCC                             [0x4E10B018] = 0x00000000

========== CSI RX IRQ & Config ==========
  CSIRX_INFO_IRQS                  [0x30101020] = 0x00000002
  CSIRX_ERROR_IRQS                 [0x30101028] = 0x00020100
  CSIRX_ERROR_IRQS_MASK            [0x3010102C] = 0x00011EF0
  CSIRX_STATIC_CFG                 [0x30101008] = 0x43210400

========== CSI RX D-PHY ==========
  CSIRX_DPHY_LANE_CTRL             [0x30101040] = 0x0001F01F
  CSIRX_DPHY_STATUS                [0x30101048] = 0x00333306
  CSIRX_DPHY_ERR_STATUS_IRQ        [0x3010104C] = 0x00000000
  CSIRX_DPHY_ERR_IRQ_MASK_CFG      [0x30101050] = 0x00000000

========== CSI RX Stream 0 ==========
  STREAM0_CTRL                     [0x30101100] = 0x00000001
  STREAM0_STATUS                   [0x30101104] = 0x80000113
  STREAM0_CFG                      [0x3010110C] = 0x00000120

========== CSI RX Stream 1 ==========
  STREAM1_CTRL                     [0x30101200] = 0x00000000
  STREAM1_STATUS                   [0x30101204] = 0x80000013
  STREAM1_CFG                      [0x3010120C] = 0x00000100

========== SHIM ==========
  SHIM_CNTL                        [0x30102010] = 0x00000001
  SHIM_DMACNTX(0)                  [0x30102020] = 0x8020002A

========== Dump Complete ==========

the patch provided by Jay was not applied yet, we will add it later

Hi Linjun,

Here is the wrong frame data we captured

according to this wrong frame data, only first 512 bytes were overwrited by DMA TR,

Dear Jay Goyal Sai Sree Kartheek Adivi Linjun Meng .

here is update from customer:

1. Seyond team has reproduced the issue last night and provided register dump and kmesg log, I attach register dump and kmesg log again in this post for easy review.

2. Seyond team found it seems UDMA has received right 512B data when issue happens as first 512Byte data is not the pattern data 0x23.

lion chen said:

another log, seems that the 512 byte is a clue

3. Seyond team also simplified the system to do CSI-RX receiving ONLY. then the issue still can be reproduced, but it costs long time than before.

4. Seyond team will add Jay's debug patch and reproduce the issue. Please let us know if need more except register dump and kmesg log.

5. Seyond team has one board that easy to reproduce this issue in lab. would you please help arrange an on-line debug session with customer for further debug?

Jay Goyal said:

Please check if the CSI2RX driver is entering the ti_csi2rx_drain_dma function. A minor patch that logs whenever the function is called is attached.

Regards,
Jay

register dump:

============================================
DMA / CSI-RX / SHIM Register Dump
2026-08-13 07:22:14
============================================

========== DMA Channel 0 ==========
STATUS0 [0x4E180040] = 0x21800000
STATUS1 [0x4E180044] = 0x01000008
BCNT [0x4E180408] = 0xFFF57AC2
SBCNT [0x4E180410] = 0xFFF2F342

========== DMA Channel 1 ==========
STATUS0 [0x4E181040] = 0x20000000
STATUS1 [0x4E181044] = 0x00000000
BCNT [0x4E181408] = 0x00000000
SBCNT [0x4E181410] = 0x00000000

========== DMA Channel 2 ==========
STATUS0 [0x4E182040] = 0x20000000
STATUS1 [0x4E182044] = 0x00000000
BCNT [0x4E182408] = 0x00000000
SBCNT [0x4E182410] = 0x00000000

========== DMA Channel 3 ==========
STATUS0 [0x4E183040] = 0x20000000
STATUS1 [0x4E183044] = 0x00000000
BCNT [0x4E183408] = 0x00000000
SBCNT [0x4E183410] = 0x00000000

========== DMA Channel 4 ==========
STATUS0 [0x4E184040] = 0x20000000
STATUS1 [0x4E184044] = 0x00000000
BCNT [0x4E184408] = 0x00000000
SBCNT [0x4E184410] = 0x00000000

========== DMA Channel 5 ==========
STATUS0 [0x4E185040] = 0x20000000
STATUS1 [0x4E185044] = 0x00000000
BCNT [0x4E185408] = 0x00000000
SBCNT [0x4E185410] = 0x00000000

========== Ring Channel 0 ==========
FOCC [0x4E100018] = 0x00000000
ROCC [0x4E101018] = 0x00000000

========== Ring Channel 1 ==========
FOCC [0x4E102018] = 0x00000000
ROCC [0x4E103018] = 0x00000000

========== Ring Channel 2 ==========
FOCC [0x4E104018] = 0x00000000
ROCC [0x4E105018] = 0x00000000

========== Ring Channel 3 ==========
FOCC [0x4E106018] = 0x00000000
ROCC [0x4E107018] = 0x00000000

========== Ring Channel 4 ==========
FOCC [0x4E108018] = 0x00000000
ROCC [0x4E109018] = 0x00000000

========== Ring Channel 5 ==========
FOCC [0x4E10A018] = 0x00000000
ROCC [0x4E10B018] = 0x00000000

========== CSI RX IRQ & Config ==========
CSIRX_INFO_IRQS [0x30101020] = 0x00000002
CSIRX_ERROR_IRQS [0x30101028] = 0x00020100
CSIRX_ERROR_IRQS_MASK [0x3010102C] = 0x00011EF0
CSIRX_STATIC_CFG [0x30101008] = 0x43210400

========== CSI RX D-PHY ==========
CSIRX_DPHY_LANE_CTRL [0x30101040] = 0x0001F01F
CSIRX_DPHY_STATUS [0x30101048] = 0x00333306
CSIRX_DPHY_ERR_STATUS_IRQ [0x3010104C] = 0x00000000
CSIRX_DPHY_ERR_IRQ_MASK_CFG [0x30101050] = 0x00000000

========== CSI RX Stream 0 ==========
STREAM0_CTRL [0x30101100] = 0x00000001
STREAM0_STATUS [0x30101104] = 0x80000113
STREAM0_CFG [0x3010110C] = 0x00000120

========== CSI RX Stream 1 ==========
STREAM1_CTRL [0x30101200] = 0x00000000
STREAM1_STATUS [0x30101204] = 0x80000013
STREAM1_CFG [0x3010120C] = 0x00000100

========== SHIM ==========
SHIM_CNTL [0x30102010] = 0x00000001
SHIM_DMACNTX(0) [0x30102020] = 0x8020002A

========== Dump Complete ==========

kmesg log:

[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034]
[ 0.000000] Linux version 6.12.35 (wowk@wowk) (aarch64-oe-linux-gcc (GCC) 13.4.0, GNU ld (GNU Binutils) 2.42.0.20240723) #1 SMP PREEMPT_RT Tue Aug 11 14:36:37 CST 2026
[ 0.000000] KASLR disabled due to lack of seed
[ 0.000000] Machine model: Texas Instruments AM62A7 SK
[ 0.000000] earlycon: ns16550a0 at MMIO32 0x0000000002800000 (options '')
[ 0.000000] printk: legacy bootconsole [ns16550a0] enabled
[ 0.000000] Reserved memory: created CMA memory pool at 0x0000000097000000, size 64 MiB
[ 0.000000] OF: reserved mem: initialized node linux,cma, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000097000000..0x000000009affffff (65536 KiB) map reusable linux,cma
[ 0.000000] OF: reserved mem: 0x0000000091880000..0x000000009307ffff (24576 KiB) nomap non-reusable optee@91880000
[ 0.000000] OF: reserved mem: 0x0000000080000000..0x000000008007ffff (512 KiB) nomap non-reusable tfa@80000000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000095f00000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@95f00000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000095f00000..0x0000000095ffffff (1024 KiB) nomap non-reusable r5f-dma-memory@95f00000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000095000000, size 15 MiB
[ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@95000000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000095000000..0x0000000095efffff (15360 KiB) nomap non-reusable r5f-dma-memory@95000000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000094f00000, size 1 MiB
[ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@94f00000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000094f00000..0x0000000094ffffff (1024 KiB) nomap non-reusable r5f-dma-memory@94f00000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000093100000, size 30 MiB
[ 0.000000] OF: reserved mem: initialized node r5f-dma-memory@93100000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000093100000..0x0000000094efffff (30720 KiB) nomap non-reusable r5f-dma-memory@93100000
[ 0.000000] Reserved memory: created DMA memory pool at 0x0000000091400000, size 4 MiB
[ 0.000000] OF: reserved mem: initialized node ipc-memories@91400000, compatible id shared-dma-pool
[ 0.000000] OF: reserved mem: 0x0000000091400000..0x00000000917fffff (4096 KiB) nomap non-reusable ipc-memories@91400000
[ 0.000000] NUMA: Faking a node at [mem 0x0000000080000000-0x000000009c70ffff]
[ 0.000000] NODE_DATA(0) allocated [mem 0x9c6c6200-0x9c6c88bf]
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000000080000000-0x000000009c70ffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000000080000000-0x000000008007ffff]
[ 0.000000] node 0: [mem 0x0000000080080000-0x00000000913fffff]
[ 0.000000] node 0: [mem 0x0000000091400000-0x00000000917fffff]
[ 0.000000] node 0: [mem 0x0000000091800000-0x000000009187ffff]
[ 0.000000] node 0: [mem 0x0000000091880000-0x000000009307ffff]
[ 0.000000] node 0: [mem 0x0000000093080000-0x00000000930fffff]
[ 0.000000] node 0: [mem 0x0000000093100000-0x0000000095ffffff]
[ 0.000000] node 0: [mem 0x0000000096000000-0x000000009c70ffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000000080000000-0x000000009c70ffff]
[ 0.000000] On node 0, zone DMA: 14576 pages in unavailable ranges
[ 0.000000] psci: probing for conduit method from DT.
[ 0.000000] psci: PSCIv1.1 detected in firmware.
[ 0.000000] psci: Using standard PSCI v0.2 function IDs
[ 0.000000] psci: Trusted OS migration not required
[ 0.000000] psci: SMC Calling Convention v1.5
[ 0.000000] percpu: Embedded 25 pages/cpu s62640 r8192 d31568 u102400
[ 0.000000] pcpu-alloc: s62640 r8192 d31568 u102400 alloc=25*4096
[ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3
[ 0.000000] Detected VIPT I-cache on CPU0
[ 0.000000] CPU features: detected: GIC system register CPU interface
[ 0.000000] CPU features: kernel page table isolation disabled by kernel configuration
[ 0.000000] CPU features: detected: ARM erratum 845719
[ 0.000000] alternatives: applying boot alternatives
[ 0.000000] Kernel command line: earlycon=ns16550a,mmio32,0x02800000 clk_ignore_unused bootflag=0 device_type=.hs_fs bist_result=11223344 secboot_status=0 uio_pdrv_genirq.of_id=generic-uio
[ 0.000000] Unknown kernel command line parameters "bootflag=0 device_type=.hs_fs bist_result=11223344 secboot_status=0", will be passed to user space.
[ 0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes, linear)
[ 0.000000] Inode-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)
[ 0.000000] Fallback order for Node 0: 0
[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 116496
[ 0.000000] Policy zone: DMA
[ 0.000000] mem auto-init: stack:all(zero), heap alloc:off, heap free:off
[ 0.000000] software IO TLB: SWIOTLB bounce buffer size adjusted to 0MB
[ 0.000000] software IO TLB: area num 4.
[ 0.000000] software IO TLB: SWIOTLB bounce buffer size roundup to 1MB
[ 0.000000] software IO TLB: mapped [mem 0x000000009bc80000-0x000000009bd80000] (1MB)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1
[ 0.000000] rcu: Preemptible hierarchical RCU implementation.
[ 0.000000] rcu: RCU restricting CPUs from NR_CPUS=16 to nr_cpu_ids=4.
[ 0.000000] rcu: RCU_SOFTIRQ processing moved to rcuc kthreads.
[ 0.000000] No expedited grace period (rcu_normal_after_boot).
[ 0.000000] Trampoline variant of Tasks RCU enabled.
[ 0.000000] Tracing variant of Tasks RCU enabled.
[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 100 jiffies.
[ 0.000000] rcu: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4
[ 0.000000] RCU Tasks: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[ 0.000000] RCU Tasks Trace: Setting shift to 2 and lim to 1 rcu_task_cb_adjust=1 rcu_task_cpu_ids=4.
[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0
[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode
[ 0.000000] GICv3: 256 SPIs implemented
[ 0.000000] GICv3: 0 Extended SPIs implemented
[ 0.000000] Root IRQ handler: 0xffff800080010098
[ 0.000000] GICv3: GICv3 features: 16 PPIs
[ 0.000000] GICv3: GICD_CTRL.DS=0, SCR_EL3.FIQ=1
[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x0000000001880000
[ 0.000000] ITS [mem 0x01820000-0x0182ffff]
[ 0.000000] GIC: enabling workaround for ITS: Socionext Synquacer pre-ITS
[ 0.000000] ITS@0x0000000001820000: Devices Table too large, reduce ids 20->19
[ 0.000000] ITS@0x0000000001820000: allocated 524288 Devices @80c00000 (flat, esz 8, psz 64K, shr 0)
[ 0.000000] ITS: using cache flushing for cmd queue
[ 0.000000] GICv3: using LPI property table @0x0000000080440000
[ 0.000000] GIC: using cache flushing for LPI property table
[ 0.000000] GICv3: CPU0: using allocated LPI pending table @0x0000000080450000
[ 0.000000] rcu: srcu_init: Setting srcu_struct sizes based on contention.
[ 0.000000] arch_timer: cp15 timer(s) running at 200.00MHz (phys).
[ 0.000000] clocksource: arch_sys_counter: mask: 0x3ffffffffffffff max_cycles: 0x2e2049d3e8, max_idle_ns: 440795210634 ns
[ 0.000000] sched_clock: 58 bits at 200MHz, resolution 5ns, wraps every 4398046511102ns
[ 0.000453] Console: colour dummy device 80x25
[ 0.692885] printk: legacy console [tty0] enabled
[ 0.692891] printk: legacy bootconsole [ns16550a0] disabled
[ 0.692977] Calibrating delay loop (skipped), value calculated using timer frequency.. 400.00 BogoMIPS (lpj=200000)
[ 0.692987] pid_max: default: 32768 minimum: 301
[ 0.693045] LSM: initializing lsm=capability
[ 0.693159] Mount-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
[ 0.693168] Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)
[ 0.695458] rcu: Hierarchical SRCU implementation.
[ 0.695468] rcu: Max phase no-delay instances is 400.
[ 0.695735] Timer migration: 1 hierarchy levels; 8 children per group; 1 crossnode level
[ 0.696183] smp: Bringing up secondary CPUs ...
[ 0.705146] Detected VIPT I-cache on CPU1
[ 0.705258] GICv3: CPU1: found redistributor 1 region 0:0x00000000018a0000
[ 0.705277] GICv3: CPU1: using allocated LPI pending table @0x0000000080460000
[ 0.705337] CPU1: Booted secondary processor 0x0000000001 [0x410fd034]
[ 0.714377] Detected VIPT I-cache on CPU2
[ 0.714467] GICv3: CPU2: found redistributor 2 region 0:0x00000000018c0000
[ 0.714482] GICv3: CPU2: using allocated LPI pending table @0x0000000080470000
[ 0.714527] CPU2: Booted secondary processor 0x0000000002 [0x410fd034]
[ 0.723483] Detected VIPT I-cache on CPU3
[ 0.723571] GICv3: CPU3: found redistributor 3 region 0:0x00000000018e0000
[ 0.723587] GICv3: CPU3: using allocated LPI pending table @0x0000000080480000
[ 0.723627] CPU3: Booted secondary processor 0x0000000003 [0x410fd034]
[ 0.723748] smp: Brought up 1 node, 4 CPUs
[ 0.723755] SMP: Total of 4 processors activated.
[ 0.723758] CPU: All CPU(s) started at EL2
[ 0.723763] CPU features: detected: 32-bit EL0 Support
[ 0.723767] CPU features: detected: CRC32 instructions
[ 0.723930] alternatives: applying system-wide alternatives
[ 0.724295] Memory: 281212K/465984K available (7040K kernel code, 978K rwdata, 1832K rodata, 1664K init, 449K bss, 112924K reserved, 65536K cma-reserved)
[ 0.724960] devtmpfs: initialized
[ 0.736739] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275000 ns
[ 0.736769] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)
[ 0.739212] 29728 pages in range for non-PLT usage
[ 0.739235] 521248 pages in range for PLT usage
[ 0.739426] pinctrl core: initialized pinctrl subsystem
[ 0.744189] NET: Registered PF_NETLINK/PF_ROUTE protocol family
[ 0.745529] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations
[ 0.745865] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations
[ 0.746145] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations
[ 0.746344] audit: initializing netlink subsys (disabled)
[ 0.746579] audit: type=2000 audit(0.744:1): state=initialized audit_enabled=0 res=1
[ 0.747197] thermal_sys: Registered thermal governor 'step_wise'
[ 0.747203] thermal_sys: Registered thermal governor 'power_allocator'
[ 0.747262] cpuidle: using governor ladder
[ 0.747299] cpuidle: using governor menu
[ 0.747597] hw-breakpoint: found 6 breakpoint and 4 watchpoint registers.
[ 0.747694] ASID allocator initialised with 65536 entries
[ 0.747912] Serial: AMBA PL011 UART driver
[ 0.753015] /bus@f0000/interrupt-controller@1800000: Fixed dependency cycle(s) with /bus@f0000/interrupt-controller@1800000
[ 0.763723] /seyond-spad-spi/seyond_spad@0: Fixed dependency cycle(s) with /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000
[ 0.764700] HugeTLB: registered 1.00 GiB page size, pre-allocated 0 pages
[ 0.764711] HugeTLB: 0 KiB vmemmap can be freed for a 1.00 GiB page
[ 0.764717] HugeTLB: registered 32.0 MiB page size, pre-allocated 0 pages
[ 0.764721] HugeTLB: 0 KiB vmemmap can be freed for a 32.0 MiB page
[ 0.764725] HugeTLB: registered 2.00 MiB page size, pre-allocated 0 pages
[ 0.764728] HugeTLB: 0 KiB vmemmap can be freed for a 2.00 MiB page
[ 0.764733] HugeTLB: registered 64.0 KiB page size, pre-allocated 0 pages
[ 0.764736] HugeTLB: 0 KiB vmemmap can be freed for a 64.0 KiB page
[ 0.766161] k3-chipinfo 43000014.chipid: Family:AM62AX rev:SR1.0 JTAGID[0x0bb8d02f] Detected
[ 0.766831] iommu: Default domain type: Translated
[ 0.766839] iommu: DMA domain TLB invalidation policy: strict mode
[ 0.767946] mc: Linux media interface: v0.10
[ 0.768072] videodev: Linux video capture interface: v2.00
[ 0.768104] pps_core: LinuxPPS API ver. 1 registered
[ 0.768109] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 0.768126] PTP clock support registered
[ 0.768162] EDAC MC: Ver: 3.0.0
[ 0.768460] scmi_core: SCMI protocol bus registered
[ 0.770657] clocksource: Switched to clocksource arch_sys_counter
[ 0.780106] NET: Registered PF_INET protocol family
[ 0.780279] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)
[ 0.781186] tcp_listen_portaddr_hash hash table entries: 256 (order: 1, 10240 bytes, linear)
[ 0.781212] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)
[ 0.781223] TCP established hash table entries: 4096 (order: 3, 32768 bytes, linear)
[ 0.781291] TCP bind hash table entries: 4096 (order: 6, 327680 bytes, linear)
[ 0.781573] TCP: Hash tables configured (established 4096 bind 4096)
[ 0.781842] UDP hash table entries: 256 (order: 2, 24576 bytes, linear)
[ 0.781895] UDP-Lite hash table entries: 256 (order: 2, 24576 bytes, linear)
[ 0.782133] NET: Registered PF_UNIX/PF_LOCAL protocol family
[ 0.782530] Trying to unpack rootfs image as initramfs...
[ 0.784187] Initialise system trusted keyrings
[ 0.784531] workingset: timestamp_bits=58 max_order=17 bucket_order=0
[ 0.784872] jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 0.825198] Key type asymmetric registered
[ 0.825223] Asymmetric key parser 'x509' registered
[ 0.825373] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 241)
[ 0.825390] io scheduler mq-deadline registered
[ 0.825397] io scheduler kyber registered
[ 0.825427] io scheduler bfq registered
[ 0.831032] pinctrl-single f4000.pinctrl: 151 pins, size 604
[ 0.839357] Serial: 8250/16550 driver, 12 ports, IRQ sharing enabled
[ 0.859040] brd: module loaded
[ 0.865431] loop: module loaded
[ 0.871500] VFIO - User Level meta-driver version: 0.3
[ 0.872624] i2c_dev: i2c /dev entries driver
[ 0.876874] SMCCC: SOC_ID: ARCH_SOC_ID not implemented, skipping ....
[ 0.877788] omap-mailbox 29000000.mailbox: omap mailbox rev 0x66fca100
[ 0.878042] omap-mailbox 29010000.mailbox: omap mailbox rev 0x66fca100
[ 0.878193] omap-mailbox 29020000.mailbox: omap mailbox rev 0x66fca100
[ 0.878275] omap-mailbox 29030000.mailbox: no available mbox devices found
[ 0.880558] hw perfevents: enabled with armv8_cortex_a53 PMU driver, 7 (0,8000003f) counters available
[ 0.881502] optee: probing for conduit method.
[ 0.881544] optee: revision 4.6 (71785645fa6ce42d)
[ 0.898441] optee: dynamic shared memory is enabled
[ 0.898871] optee: initialized driver
[ 0.900583] GACT probability on
[ 0.900614] Mirror/redirect action on
[ 0.900765] u32 classifier
[ 0.900769] input device check on
[ 0.900771] Actions configured
[ 0.901436] NET: Registered PF_PACKET protocol family
[ 0.901452] 8021q: 802.1Q VLAN Support v1.8
[ 0.901511] Key type dns_resolver registered
[ 0.909722] registered taskstats version 1
[ 0.909953] Loading compiled-in X.509 certificates
[ 0.919060] Demotion targets for Node 0: null
[ 0.925762] ti-sci 44043000.system-controller: ABI: 4.0 (firmware rev 0x000b '11.1.5--v11.01.05 (Fancy Rat)')
[ 0.983787] platform 79000000.r5f: configured R5F for remoteproc mode
[ 0.984197] platform 79000000.r5f: assigned reserved memory node r5f-dma-memory@95f00000
[ 0.984634] remoteproc remoteproc0: 79000000.r5f is available
[ 0.997866] sht4x 1-0044: probe with driver sht4x failed with error -121
[ 0.997970] omap_i2c 20010000.i2c: bus 1 rev0.12 at 100 kHz
[ 0.999491] omap_i2c 20020000.i2c: bus 2 rev0.12 at 100 kHz
[ 0.999940] ti-sci-intr 4210000.interrupt-controller: Interrupt Router 5 domain created
[ 1.000163] ti-sci-intr bus@f0000:interrupt-controller@a00000: Interrupt Router 3 domain created
[ 1.000472] ti-sci-inta 48000000.interrupt-controller: Interrupt Aggregator domain 28 created
[ 1.000895] ti-sci-inta 4e0a0000.interrupt-controller: Interrupt Aggregator domain 200 created
[ 1.003805] ti-udma 485c0100.dma-controller: Number of rings: 82
[ 1.004053] ti-udma 485c0100.dma-controller: ti_sci resource range for bchan: 0:18 | 0:0
[ 1.004063] ti-udma 485c0100.dma-controller: ti_sci resource range for tchan: 0:12 | 0:0
[ 1.004071] ti-udma 485c0100.dma-controller: ti_sci resource range for rchan: 0:18 | 0:0
[ 1.007828] ti-udma 485c0100.dma-controller: Channels: 48 (bchan: 18, tchan: 12, rchan: 18)
[ 1.011876] ti-udma 485c0000.dma-controller: Number of rings: 150
[ 1.012863] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 0:10 | 0:0
[ 1.012877] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 19:8 | 0:0
[ 1.012885] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 27:1 | 0:0
[ 1.012892] ti-udma 485c0000.dma-controller: ti_sci resource range for tchan: 28:1 | 0:0
[ 1.012900] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 0:10 | 0:0
[ 1.012907] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 19:1 | 0:0
[ 1.012915] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 20:1 | 0:0
[ 1.012922] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 21:1 | 0:0
[ 1.012929] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 22:1 | 0:0
[ 1.012937] ti-udma 485c0000.dma-controller: ti_sci resource range for rchan: 23:1 | 0:0
[ 1.012944] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 0:10 | 0:0
[ 1.012951] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 19:16 | 0:0
[ 1.012959] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 35:8 | 0:0
[ 1.012966] ti-udma 485c0000.dma-controller: ti_sci resource range for rflow: 43:8 | 0:0
[ 1.012973] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 0:10 | 0:0
[ 1.012981] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 19:64 | 0:0
[ 1.012988] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 83:8 | 0:0
[ 1.012995] ti-udma 485c0000.dma-controller: ti_sci resource range for tflow: 91:8 | 0:0
[ 1.019772] ti-udma 485c0000.dma-controller: Channels: 35 (tchan: 20, rchan: 15)
[ 1.023028] ti-udma 4e230000.dma-controller: Number of rings: 6
[ 1.023172] ti-udma 4e230000.dma-controller: ti_sci resource range for rchan: 0:6 | 0:0
[ 1.024046] ti-udma 4e230000.dma-controller: Channels: 6 (bchan: 0, tchan: 0, rchan: 6)
[ 1.026992] 2800000.serial: ttyS2 at MMIO 0x2800000 (irq = 251, base_baud = 3000000) is a 8250
[ 1.027114] printk: legacy console [ttyS2] enabled
[ 1.029552] 2820000.serial: ttyS0 at MMIO 0x2820000 (irq = 253, base_baud = 3000000) is a 8250
[ 1.031690] ti-udma 485c0100.dma-controller: bcdma_alloc_chan_resources: chan0 as MEM-to-MEM
[ 1.033897] spi-nor spi0.0: read_opcode: 0x13
[ 1.034072] 10 fixed-partitions partitions found on MTD device fc40000.spi.0
[ 1.034086] Creating 10 MTD partitions on "fc40000.spi.0":
[ 1.034095] 0x000000000000-0x000000080000 : "sbl"
[ 1.035948] 0x000000080000-0x000000380000 : "log"
[ 1.037548] 0x000000380000-0x0000003a0000 : "phypattern"
[ 1.039204] 0x0000003a0000-0x0000003d0000 : "bootflag-a"
[ 1.041137] 0x0000003d0000-0x000000400000 : "bootflag-b"
[ 1.042882] 0x000000400000-0x000000480000 : "sbl.backup"
[ 1.044534] 0x000000480000-0x0000006c0000 : "mnt"
[ 1.046092] 0x0000006c0000-0x000000900000 : "backup"
[ 1.047639] 0x000000900000-0x000002480000 : "image-a"
[ 1.049447] 0x000002480000-0x000004000000 : "image-b"
[ 1.059888] am65-cpsw-nuss 8000000.ethernet: initializing am65 cpsw nuss version 0x6BA01103, cpsw version 0x6BA81103 Ports: 3 quirks:00000006
[ 1.060898] davinci_mdio 8000f00.mdio: Configuring MDIO in manual mode
[ 1.093731] davinci_mdio 8000f00.mdio: davinci mdio revision 9.7, bus freq 1000000
[ 1.377704] Freeing initrd memory: 12680K
[ 1.378341] remoteproc remoteproc0: powering up 79000000.r5f
[ 1.378375] remoteproc remoteproc0: Booting fw image am62a-mcu-r5f0_0-fw, size 186272
[ 1.379257] remoteproc remoteproc0: trace buffer: da 0x95000400, len 0x1000
[ 1.379734] rproc-virtio rproc-virtio.0.auto: assigned reserved memory node r5f-dma-memory@95f00000
[ 1.380391] davinci_mdio 8000f00.mdio: phy[1]: device 8000f00.mdio:01, driver YT8011 Automotive Gigabit Ethernet
[ 1.380584] am65-cpsw-nuss 8000000.ethernet: initialized cpsw ale version 1.5
[ 1.380592] am65-cpsw-nuss 8000000.ethernet: ALE Table size 512, Policers 32
[ 1.380955] virtio_rpmsg_bus virtio0: rpmsg host is online
[ 1.380982] rproc-virtio rproc-virtio.0.auto: registered virtio0 (type 7)
[ 1.380991] remoteproc remoteproc0: remote processor 79000000.r5f is now up
[ 1.381594] am65-cpsw-nuss 8000000.ethernet: CPTS ver 0x4e8a010c, freq:500000000, add_val:1 pps:0
[ 1.388551] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.388551] udma_tchan_id: 19
[ 1.388551] src_thread: 00001013
[ 1.388551] dst_thread: 0000c600
[ 1.398849] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.398849] udma_tchan_id: 20
[ 1.398849] src_thread: 00001014
[ 1.398849] dst_thread: 0000c601
[ 1.411901] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.411901] udma_tchan_id: 21
[ 1.411901] src_thread: 00001015
[ 1.411901] dst_thread: 0000c602
[ 1.433600] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.433600] udma_tchan_id: 22
[ 1.433600] src_thread: 00001016
[ 1.433600] dst_thread: 0000c603
[ 1.443669] virtio_rpmsg_bus virtio0: creating channel rpmsg_chrdev addr 0xe
[ 1.454844] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.454844] udma_tchan_id: 23
[ 1.454844] src_thread: 00001017
[ 1.454844] dst_thread: 0000c604
[ 1.466388] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.466388] udma_tchan_id: 24
[ 1.466388] src_thread: 00001018
[ 1.466388] dst_thread: 0000c605
[ 1.476045] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.476045] udma_tchan_id: 25
[ 1.476045] src_thread: 00001019
[ 1.476045] dst_thread: 0000c606
[ 1.489438] am65-cpsw-nuss 8000000.ethernet: dump_tx_chn:
[ 1.489438] udma_tchan_id: 26
[ 1.489438] src_thread: 0000101a
[ 1.489438] dst_thread: 0000c607
[ 1.496305] am65-cpsw-nuss 8000000.ethernet: dump_rx_chn:
[ 1.496305] udma_rchan_id: 19
[ 1.496305] src_thread: 00004600
[ 1.496305] dst_thread: 00001013
[ 1.496305] epib: 1
[ 1.496305] hdesc_size: 96
[ 1.496305] psdata_size: 16
[ 1.496305] swdata_size: 16
[ 1.496305] flow_id_base: 19
[ 1.496305] flow_num: 1
[ 1.499816] am65-cpsw-nuss 8000000.ethernet: set new flow-id-base 19
[ 1.499832] ti-udma 485c0000.dma-controller: get rflow19
[ 1.499985] am65-cpsw-nuss 8000000.ethernet: flow19 config done. ready:1
[ 1.500818] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.500976] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.500984] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.500994] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501000] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501005] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501011] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501017] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.501023] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501033] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501039] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501044] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501050] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501057] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.501201] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.501207] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501217] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501222] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501228] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501234] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501240] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.501247] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501257] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501262] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501268] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501273] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501280] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.501424] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.501430] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501439] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501445] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501451] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501457] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501462] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.501469] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501479] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501484] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501490] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501495] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501502] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.501665] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.501671] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501680] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501686] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501692] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501697] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501703] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.501710] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501719] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501725] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501730] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501736] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501743] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.501888] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.501894] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501904] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501909] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501915] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501920] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501926] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.501933] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.501942] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.501948] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.501953] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.501959] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.501965] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.502108] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.502114] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502125] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502130] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502136] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502142] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502148] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.502155] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502164] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502170] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502176] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502181] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502188] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.502334] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.502339] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502349] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502355] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502360] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502366] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502371] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.502378] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502388] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502393] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502399] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502404] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502410] am65-cpsw-nuss 8000000.ethernet: TX reset occ_tx 0
[ 1.502553] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis1
[ 1.502558] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502568] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502573] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502579] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502585] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502590] am65-cpsw-nuss 8000000.ethernet: === dump ===> txchn dis2
[ 1.502597] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502607] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502612] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502618] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502623] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502629] am65-cpsw-nuss 8000000.ethernet: RX reset flow 0 occ_rx 0
[ 1.502636] am65-cpsw-nuss 8000000.ethernet: RX reset flow 0 occ_rx_fdq 0
[ 1.502798] am65-cpsw-nuss 8000000.ethernet: === dump ===> rxrt dis1
[ 1.502804] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502814] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502820] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502826] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502832] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.502842] am65-cpsw-nuss 8000000.ethernet: === dump ===> rxrt dis2
[ 1.502847] am65-cpsw-nuss 8000000.ethernet: 0x00000000: 00000000
[ 1.502857] am65-cpsw-nuss 8000000.ethernet: 0x00000220: 00000000
[ 1.502862] am65-cpsw-nuss 8000000.ethernet: 0x00000400: 00000000
[ 1.502868] am65-cpsw-nuss 8000000.ethernet: 0x00000408: 00000000
[ 1.502874] am65-cpsw-nuss 8000000.ethernet: 0x00000410: 00000000
[ 1.505222] j721e-csi2rx 30102000.ticsi2rx: Mapped cdns,csi2rx core at /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000 for error diagnostics
[ 1.507960] ti-udma 4e230000.dma-controller: chan0: Remote thread: 0x5000 (DEV_TO_MEM)
[ 1.507976] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan0 as DEV-to-MEM
[ 1.507986] ti-udma 4e230000.dma-controller: get rflow0
[ 1.509260] ti-udma 4e230000.dma-controller: chan1: Remote thread: 0x5001 (DEV_TO_MEM)
[ 1.509274] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan1 as DEV-to-MEM
[ 1.509283] ti-udma 4e230000.dma-controller: get rflow1
[ 1.510302] ti-udma 4e230000.dma-controller: chan2: Remote thread: 0x5002 (DEV_TO_MEM)
[ 1.510314] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan2 as DEV-to-MEM
[ 1.510321] ti-udma 4e230000.dma-controller: get rflow2
[ 1.511297] ti-udma 4e230000.dma-controller: chan3: Remote thread: 0x5003 (DEV_TO_MEM)
[ 1.511308] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan3 as DEV-to-MEM
[ 1.511315] ti-udma 4e230000.dma-controller: get rflow3
[ 1.512269] ti-udma 4e230000.dma-controller: chan4: Remote thread: 0x5004 (DEV_TO_MEM)
[ 1.512280] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan4 as DEV-to-MEM
[ 1.512287] ti-udma 4e230000.dma-controller: get rflow4
[ 1.513105] ti-udma 4e230000.dma-controller: chan5: Remote thread: 0x5005 (DEV_TO_MEM)
[ 1.513115] ti-udma 4e230000.dma-controller: bcdma_alloc_chan_resources: chan5 as DEV-to-MEM
[ 1.513123] ti-udma 4e230000.dma-controller: get rflow5
[ 1.514121] /seyond-spad-spi/seyond_spad@0: Fixed dependency cycle(s) with /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000
[ 1.514318] /bus@f0000/ticsi2rx@30102000/csi-bridge@30101000: Fixed dependency cycle(s) with /seyond-spad-spi/seyond_spad@0
[ 1.515507] cdns-csi2rx 30101000.csi-bridge: Probed CSI2RX with 4/4 lanes, 4 streams, external D-PHY
[ 1.516432] ti-udma 4e230000.dma-controller: chan0: put rflow0
[ 1.516446] ti-udma 4e230000.dma-controller: put rflow0
[ 1.516452] ti-udma 4e230000.dma-controller: chan0: put rchan0
[ 1.517253] ti-udma 4e230000.dma-controller: chan1: put rflow1
[ 1.517265] ti-udma 4e230000.dma-controller: put rflow1
[ 1.517270] ti-udma 4e230000.dma-controller: chan1: put rchan1
[ 1.517966] ti-udma 4e230000.dma-controller: chan2: put rflow2
[ 1.517977] ti-udma 4e230000.dma-controller: put rflow2
[ 1.517982] ti-udma 4e230000.dma-controller: chan2: put rchan2
[ 1.518705] ti-udma 4e230000.dma-controller: chan3: put rflow3
[ 1.518717] ti-udma 4e230000.dma-controller: put rflow3
[ 1.518723] ti-udma 4e230000.dma-controller: chan3: put rchan3
[ 1.519315] ti-udma 4e230000.dma-controller: chan4: put rflow4
[ 1.519325] ti-udma 4e230000.dma-controller: put rflow4
[ 1.519330] ti-udma 4e230000.dma-controller: chan4: put rchan4
[ 1.520064] ti-udma 4e230000.dma-controller: chan5: put rflow5
[ 1.520076] ti-udma 4e230000.dma-controller: put rflow5
[ 1.520081] ti-udma 4e230000.dma-controller: chan5: put rchan5
[ 1.535765] cdns-csi2rx 30101000.csi-bridge: Bound imx459 spi4.0 pad: 0
[ 1.538978] clk: Not disabling unused clocks
[ 1.538992] PM: genpd: Disabling unused power domains
[ 2.781161] Freeing unused kernel memory: 1664K
[ 2.781255] Run /init as init process
[ 2.781258] with arguments:
[ 2.781261] /init
[ 2.781263] with environment:
[ 2.781265] HOME=/
[ 2.781267] TERM=linux
[ 2.781270] bootflag=0
[ 2.781272] device_type=.hs_fs
[ 2.781275] bist_result=11223344
[ 2.781277] secboot_status=0

thanks a lot!

yong

Hi Yong, Lion,

Yong Zhang said:

Seyond team has one board that easy to reproduce this issue in lab.

Can you please clarify the following points regarding the board on which this issue is occurring, and the boards that are fine:

1. Do they share the same design?
2. Are there any changes from a software perspective? If yes, what are they?
3. Do different boards of the same design behave differently?

Yong Zhang said:

Seyond team also simplified the system to do CSI-RX receiving ONLY. then the issue still can be reproduced, but it costs long time than before.

Can you please tell me the exact test that you are doing here? Please share the test application code if possible. I suspect that this issue could be due to latency spikes when setting or parsing the flags. This would result in the drain mechanism being triggered. To debug this, we can go one of two routes:

1. Add the log that I shared previously and check if you get those kernel prints.
2. Reduce the queue depth and check if you see the issue occurring sooner. Increasing the queue depth should delay it.

Please share your A53 core load as well.

Yong Zhang said:

would you please help arrange an on-line debug session with customer for further debug?

I would prefer that we schedule this after we have done some more analysis on the new issue where a partial frame is being dequeued. This would make sure that we don't spend the call on the initial questions.

Side note: I have also edited your response so that the kernel logs are in a dedicated code block.

Regards,
Jay