Part Number: J721EXCPXEVM
Other Parts Discussed in Thread: TDA4VM, J721EXSOMXEVM, DRA829V, DRA829
Board: J721EXSOMXEVM (TDA4VM/DRA829V SOM on Common Processor Board), brand new/first power-up Target config: J721E_DRA829_TDA4VM board selected in CCS 21.0.0.3955, XDS110 onboard debug probe Power supply: 13.8V DC, 3A (within documented 6-28V input range)
Symptom: No UART output and no successful JTAG connection on any core, on a brand-new board's first power-up.
Steps already taken:
- Loaded SD card with prebuilt Processor SDK RTOS image (boot-j7-evm.tar.gz + tisdk-default-image-j7-evm.tar.xz) — confirmed both BOOT and rootfs partitions populated correctly with tiboot3.bin, tispl.bin, u-boot.img, sysfw.itb, and full rootfs tree.
- Verified boot mode switches for SD Boot Mode (SW8=1000 0010, SW9=0000 0000) — zero UART output, all 4 Main UART ports (FT4232H, /dev/ttyUSB0-3) tested at 115200 8N1, confirmed correct permissions/dialout group, tried both screen and raw cat.
- Switched to No Boot Mode (SW8=1000 1000, SW9=0111 0000) to test JTAG/CCS connectivity directly, bypassing SD boot entirely.
- Confirmed XDS110 onboard probe enumerates correctly via USB (0451:bef3), CCS detects and loads target config without issue.
- Attempted JTAG connection across multiple cores:
- DMSC_Cortex_M3_0: Error -6305 "PRSC module failed to write to a router register"
- CortexA72_0_0: Error -1170 "Unable to access the DAP"
- C71X_0: Error -2081 "Device functional clock appears to be off"
- CortexA72_0_1: Error -1170 (same as A72_0_0)
- Full power cycle (switch off 10s, back on) — identical errors persisted.
- Removed Ethernet expansion daughter card, retested with just SOM + Common Processor Board — identical errors persisted.
- Reseated the SOM on the Common Processor Board (visually flush, no wobble before or after) — identical errors persisted.
- Confirmed correct board device selected in .ccxml (J721E_DRA829_TDA4VM) — Access Port Designator and CPU list populated correctly once selected.
- LEDs: 4 LEDs on Common Processor Board + 1 on daughter board illuminate solid (non-flashing) on power-on in all test configurations.
Question: Given total UART silence and consistent JTAG failures across all core types (M3, A72, C71x) even after eliminating cabling, daughter card, SOM seating, and CCS/board-config variables, does this pattern point to a specific power-sequencing or hardware fault on a new board? Is there a known issue with 13.8V input specifically affecting power-up sequencing timing, or does this warrant an RMA/DOA evaluation?
Happy to provide rail voltage measurements, debug probe logs, or additional diagnostics on request.
