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PRU Enhanced GPIO / 28 bit shift mode - why?

Christopher Piggott
Intellectual 570 points

Hi,

Can somebody explain to me what exactly is the intent for the 28-bit shift mode of the PRU? 28 bits is kind of a strange fixed length.  It makes me think that T.I. had some specific purpose in mind.  I'm just wondering what it is.

--Chris

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    TI__Intellectual 1835 points

    In AM335x variants with the PRU subsystem, this mode is available. There is a 32-bit register into which data is shifted. Four MSBs are used for status information. Hence, 28-bits are available. It is possible that not all bits will be necessary in all applications but are available if needed. 

    This shift register mode can be used for interfacing to digital serial communication protocols that are used in a very broad range of applications. The purpose is to use PRU in such situations and may be avoid having to use external device(s).

    Thanks.

    PS: Please be sure to mention the device/part for which the question is intended.