Part Number: J722SXH01EVM
Other Parts Discussed in Thread: SYSCONFIG
Hello TI,
I am implementing CSITX support in the J722S Processor SDK RTOS vision_apps application.
My target environment is:
- Processor SDK RTOS: 11_01_00_04
- Platform: J722S EVM
- Application: vision_apps
- CPU: MCU2_0
- Goal: Replace the DSS display output with CSITX output.
I have a question regarding the required initialization for the CSITX hardware.
In the MCU+ SDK CSITX example,
ti-processor-sdk-rtos-j722s-evm-11_01_00_04/
mcu_plus_sdk_j722s_11_01_00_15/
examples/drivers/csitx/csitx_transmit_test/
j722s-evm/main-r5fss0-0_freertos/main_rtos.c
the application performs its own initialization.
However, when implementing CSITX inside vision_apps, I am unsure whether the following SysConfig settings must also be enabled.
- MAIN CSI TX
- CSI_TX_IF0
- DPHY_TX0
(Please refer to the attached screenshot.)
My questions are:
- When adding CSITX functionality to vision_apps, is enabling the above SysConfig settings sufficient and recommended?
- Or should I port the initialization code from the MCU+ SDK example (
main_rtos.c) into vision_apps? - If both are required, which initialization should be responsible for enabling the CSITX module clocks and power (PSC/TISCI)?
- What is the recommended integration method for CSITX in vision_apps?
I would appreciate it if you could clarify the recommended software architecture for integrating CSITX into vision_apps.
Thank you.