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DDR3 configuration in u-boot

Hi,

I have an self designed DM8148 Board which has of course different memory type and structure than the EZ Evaluation Boards. So I have to change the EVM u-boot files to adapt the settings for my board (Both emifs are used on each port two 16byte wide 256MBit DDR3 RAM 667MHz (Micron) - 1GByte in Sum).

The problem is that the u-boot loader hangs in the evm.c file at the config_ti814x_ddr - it doesn't cam out of the second while loop waiting for the VTP1_CTRL_REG becoming some bit setted. The first while loop, where VTP0_CTRL_REG ist checked is not a problem. (DDR clock is setted to very low 200MHz)

// Read VTP control registers & check READY bits
    while ((__raw_readl(VTP0_CTRL_REG) & 0x00000020) != 0x20);

    while ((__raw_readl(VTP1_CTRL_REG) & 0x00000020) != 0x20);

What could be wrong ?

My other problem is, that all these registers (I mean all the registers out of the u-boot\asm\arch\cpu.h defined by the CTRL_BASE +0x800 and above) are not described anywhere in the TRM or datasheets ... .

Regards, Andy

  • Andy,

    We have not come across an issue like this before. Both the VTP controllers are identical. If VTP calibration for one of the EMIF is not completing, I would suspect the VTP related circuitry on the board first. Please very the same from you end and let me know the status.

    Regards

    Deepu Raj