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sys bBIOS cache question for C66 platform.

C. García
Intellectual 830 points
Other Parts Discussed in Thread: SYSBIOS

Hi,

We are using cache functions and there are some questions:
(I took the invalidate function as example but obviouslly my questions
 refer also to the whole cache libraries).

1.- What is the difference between:
        Cache_inv (var, sizeof(var), Cache_Type_L1D, CACHE_WAIT) and 
        CACHE_invL1d (var, sizeof(var), CACHE_WAIT) ?

2.- When to use the first one or the second one?


3.- Why in the case of CACHE_invL1d there are three options wait (CACHE_NOWAIT, CACHE_WAIT and CACHE_FENCE_WAIT)
    whereas that in the function Cache_inv the third option does not exist?

4.- Is not clear from the help the difference between  CACHE_WAIT and CACHE_FENCE_WAIT options. Please, could
     somebody explain them in detail?

 

Thanks in advance.

Shmuel.

 

  • 0
    TI__Mastermind 32475 points

    Shmulik,

    The APIs Cache_xxx() - These come from the SYSBIOS product which I'm familiar with.
    The APIs CACHE_xxx() - These are CSL APIs and I'm not very familiar with these APIs.

    In general, if you are using SYSBIOS, you want to stick with the SYSBIOS APIs.  There could be some exceptions to the rule.

    Answer to #1
    Not knowing the implementation of CACHE_invL1d, my best guess is that both APIs are trying to achieve the same functionality.
    Functionality wise, I think they are the same.  The difference could be performance and portability.  SYSBIOS APIs are more generic
    to work across different platforms/archectures.  CSL APIs tend to be more low level, so it might be better at performance.

    Answer to #2
    I think these two APIs are functionally equivalent.

    Answer to #3
    Cache_inv() always performs a mfence() when waiting.

    Answer to #4
    WAIT - typically means only wait for the cache to finish its functionality.  FENCE_WAIT means wait for the cache and memory subsystem to be completed.
    A scenario where you would want to use FENCE_WAIT is when some external memory is being shared by 2 different cores.  If once cores does a
    cache writeback of some memory, it would want to do a FENCE_WAIT before it lets the other core know that its okay for the other core to read the memory.
    This sort of guarantees that the writeback has actually landed in external memory.  Doing just a wait, means its out of the core's cache but not necessarily
    landed in external memory yet.

    Judah

  • 0 in reply to judahvang
    Intellectual 830 points

    Judah,

     

    According to your answers I need exactly in the C6678 to share memory.

    The Cache_wb() function from sysbios that doesn't has the option FENCE_WAIT, performs automatically the fence or not?

    If I need to perform cache write back or cache invalidate in the main before the call to BIOSstart() function, wich library I need to use? (CSL CACHE or sysbios Cache)?

     

    Thanks.

    Shmuel.

     

  • 0 in reply to C. García
    TI__Mastermind 32475 points

    Shmuel,

    If you specify wait = true for Cache_wb(), it will perform the fence_wait.  In SYSBIOS there is only two options
    (a) - wait = false [this means do not wait]
    (b) - wait = true [this means do a full mfence wait]

    My recommendation is for you to use SYSBIOS cache calls in main() since you are using SYSBIOS.

    Judah