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TDA4VM: PCIe x2 Lane Reversal Support and Required Configuration

Jack
Guru 10006 points

Part Number: TDA4VM

Hello TI E2E Team,

We are designing a board using the TDA4VM PCIe x2 interface and would like to confirm whether PCIe Lane Reversal can be used.

Due to PCB routing constraints, we would like to connect the lanes as follows:

  • TDA4VM Lane 0 → Endpoint Lane 1
  • TDA4VM Lane 1 → Endpoint Lane 0
  • The same reversal is applied to both TX and RX.

We found a previous E2E discussion indicating that TDA4VM supports PCIe Lane Reversal. We also found the LRS field in PCIE_CORE_LM_I_NEGOTIATED_LANE_MAP_REG, but could not find a clear description of whether any explicit configuration is required.

Could you please confirm:

  1. Whether the above x2 lane-reversed connection is supported on TDA4VM.
  2. Whether Lane Reversal is automatically detected during PCIe Link Training.
  3. Whether any software, Device Tree, or register configuration is required.

Please see the attached figure for the proposed lane routing.

Best regards,
Jack