DM8168 set the DDR CLK

lingyi ying

hi ,

everyone

who can tell me how to change the clock of the DDR3 in uboot on the evm board of DM8168?
When I set the u-boot as flowers:

In arch/arm/include/asm/arch-ti81xx/clocks_ti816x.h which is in /ti-ezsdk_dm816x-evm_5_03_00_09/board support/u-boot-2010.06-psp04.00.01.13.patch1,

I add the #define shown below as appropriate

#define DDR_PLL_675 /* Values supported 400,531,675,796 */

In arch/arm/include/asm/arch-ti81xx/ddr_defs_ti816x.h which is in /ti-ezsdk_dm816x-evm_5_03_00_09/board support/u-boot-2010.06-psp04.00.01.13.patch1,

I add the #define shown below as appropriate

[...]

#ifdef CONFIG_TI816X_EVM_DDR3

 #define CONFIG_TI816X_DDR3_675 /* Values supported 400,531,675,796 */

#define CONFIG_TI816X_DDR3_SW_LEVELING /* Enable software leveling as part of DDR3 init */

[...]

The Serial print "DDR clk: 675MHz " ,but actually t the measuring of the DDR CLK is  796MHZ usingoscilloscope,

and the value of the DDR PLL Control Registers is  corresponding to 796MHZ。

over 13 years ago

0 Anil over 13 years ago

TI__Expert 6655 points

Hi Lingyi ying,

Change macros at these two locations, then frequency will change to 675MHz.

In arch/arm/include/asm/arch-ti81xx/ddr_defs.h file
-#define CONFIG_TI816X_DDR3_796 /* Values supported 400,531,675,796 */
+#define CONFIG_TI816X_DDR3_675 /* Values supported 400,531,675,796 */

In arch/arm/include/asm/arch-ti81xx/clocks_ti816x.h file
-#define DDR_PLL_796 /* Values supported 400,531,675,796 */
+#define DDR_PLL_675 /* Values supported 400,531,675,796 */

With the above two modification I had seen values changed in the DDR_PLL registers

Along with the above values, could you please change this value as well in the same file "clocks_ti816x.h". (I found this error in 675MHz settings, as a safety measure)

-#define DDR_INTFREQ3 0x13
+#define DDR_INTFREQ3 13

Regards

AnilKumar

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0 lingyi ying over 13 years ago in reply to Anil

Prodigy 90 points

Hi,AnilKumar

Thank you for your answer, but following your answer, I still had not seen values changed in the DDR_PLL registers.

0 Anil over 13 years ago in reply to lingyi ying

TI__Expert 6655 points

Lingyi Ying,

Could you provide the bootlog (from power-up) and DDR_PLL registers dump from u-boot?

TI8168_EVM#md 0x48140440

Regards

AnilKumar

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0 Lei Wong over 13 years ago

Expert 1355 points

anli is right,

you should change both clocks_ti816x.h and ddr_defs_ti816x.h.

It works on my board.

I changed it to 400Mhz. It shows like below

                                                                               
TI8168-GP rev 1.1                                                              
                                                                               
ARM clk: 987MHz                                                                
DDR clk: 398MHz                                                                
                                                                               
I2C:   ready                                                                   
DRAM:  1 GiB                                                                   
NAND:  HW ECC Hamming Code selected                                            
256 MiB

Regards,

Lei

0 lingyi ying over 13 years ago in reply to Anil

Prodigy 90 points

Hi, AnilKumar

the bootlog (from power-up) as flowers:

U-Boot 2010.06 (Nov 10 2011 - 19:25:12)

DRAM: 2 GiB
Using default environment

MMC: OMAP SD/MMC: 0
Hit any key to stop autoboot: 0
raise: Signal # 8 caught
reading u-boot.bin

340640 bytes read
## Starting application at 0x80800000 ...

U-Boot 2010.06 (Feb 26 2012 - 21:37:37)

TI8168-GP rev 1.1

ARM clk: 987MHz
DDR clk: 675MHz

I2C: ready
DRAM: 2 GiB
NAND: HW ECC Hamming Code selected
256 MiB
:,;;:;:;;;;;;;;r;;:,;;:;:;;;;;;;;:,;;:;:;;;;;;;;:,;;:;:;;;;;;;;:;;;;;;;;:,;;:;:
;,;:::;;;;r;;;rssiSiS552X5252525259GX2X9hX9X9XX2325S55252i5:,;;:;:;;;;;;;;:,;;:
;:;;;;;;;rrssSsS52S22h52299GGAAMHMM#BBH#B#HMM#HMBA&&XX2255S2S5Si:,;;:;:;;;;;;;;
;:;;r;;rsrrriiXS5S329&A&MH#BMB#A&9XXA252GXiSXX39AAMMMBB&G22S5i2SSiiiisi:,;;:;:;
;;;;;r;rr2iisiih393HB#B#AA99i22irrrX3X52AGsisss2Xii2299HBMA&X2S5S5iSiisSsi:,;;:
r:r;rrsrsihXSi2&##MHB&Ahh3AGHGA9G9h&#H##@@@##MAMMXXX9SSS29&&HGGX2i5iisiiisisi:,
;;rrrrsSiiiA&ABH&A9GAGhAhBAMHA9HM@@@@@@@@@@@@@@@@@@@HHhAh2S2SX9&Gh22SSiisiiisii
r:rrssisiS2XM##&h3AGAX&3GG3Ssr5H@M#HM2; ;2X&&&MHMB###GBB#B&XXSSs529XX55iSsisisi
r;rsrisSi2XHAhX99A3XXG&&XS;:,rH#HGhAS @@@@3rs2XBM@@A552&&AHA2XiisSS252SSsisSs
r;issi5S22&&3iSSX292&hXsr;;:;h@&G339&S9@@@@2@MA&9&HB##Xris29ABMAAX2ir;rsSi5iss5
rrsSi2XhG&9GXh399&X99i;;;;;;r#H&293H9X#@@@@@@@B&9GhAH@XrrsrsiXABHB&HG2rr;rrSiSi
;:rsisS599&AA9XG&3A35r;:::;,;BMh&&2iX5A@@@@@@@&392X5GB2;;;r;iSX393A##A&Xi:::rsi
;:rss552222X553&XHMhir;;::,:,h#HhGSXhG3#@@@@#AXXS2XAHA;::;;;;ss55XShBA3239r:,;;
r;ii2S5SSi2i53hirsh2srr::,,,,;MMXX359&Ah3h&Si59SX99A#i:,::::;;sri2,.2r;:SGAr;,:
;:;rrrrssiriXGSi::shs;;;,,,:,,rBBA9h5s5h5iS5isi2SAHB5:,,,:::;rrs5&SrisSX5Srrr:,
;,r;;;;rsriSSrrrr;;5Xrr;;,:,,.,;9AA2SsisS5323XXXG9&i:.,,::;;r;;;srrrrrr;;:;::::
:,;r;r;rrissrrr;:;::;s;;;;,:,,..,r293h222hXXAAGGGX;:,,,:,:,::;:;::,:,,,,...,,,,
;,;;;;rrrrrrrrirr;,.,,:::::::,,,,.,;SX&ABAB2hhXir:,,.,,.,,:,,,,..,,,..,..,,,..:
:.:;:;;;:;;;;r;rrs;:.. ,,:::::,:,:,,.::rrsrr;;,,.......,..,....,,,,,,,...,.,,:,
:.:::,::::::;;r;rrr;:.......,.,.,,:::,,...............,,::.,,,,:,::,,:,:,,,:,;:
,.::,:,,,,,;;;;;;;;r;;::,..............................;;;:;::::,:::::::,:,:,,,
: ,,:,,,,,,,,,,,,,:;rrr;;:;,,,,,,,::,.,.:.,.,;s,:;;;;:;:;;;;;::::,:::,:::,:,:,:
,.,,,,,,,...,,.,,....................................:,............:,,,:,:,,,,,

MMC:   OMAP SD/MMC: 0
Net:   Detected MACID:90:d7:eb:36:39:a4
Ethernet PHY: GENERIC @ 0x01
DaVinci EMAC
Hit any key to stop autoboot: 0
TI8168_EVM#
TI8168_EVM#
TI8168_EVM#md 0x48140440
48140440: 003b018c 00000000 00000000 00000102    ..;.............
48140450: 98d99999 0000011e 98000000 00000104    ................
48140460: 8e000000 00000104 8e000000 00000104    ................
48140470: 006e028c 00000000 8b000000 00000105    ..n.............
48140480: 8a000000 00000102 8a000000 00000102    ................
48140490: 00000000 00000000 00000000 00000000    ................
481404a0: 00401988 00000000 00000000 00000000    ..@.............
481404b0: 8e000000 00000104 89000000 00000105    ................
481404c0: 89cbc148 00000114 8d800000 00000114    H...............
481404d0: 00000000 00000000 00000000 00000000    ................
481404e0: 00000000 00000000 00000000 00000000    ................
481404f0: 00000000 00000000 00000000 00000000    ................
48140500: 00000000 00000000 00000000 00000000    ................
48140510: 00000000 00000000 00000000 00000000    ................
48140520: 00000000 00000000 00000000 00000000    ................
48140530: 00000000 00000000 00000000 00000000    ................
TI8168_EVM#

0 Anil over 13 years ago in reply to lingyi ying

TI__Expert 6655 points

Hi Lingyi Ying,

U-Boot 2010.06 (Nov 10 2011 - 19:25:12)

This tells me that code was build on November 10th 2011. (First stage)

Could you please do only the above modifications, build the u-boot (distclean and re-build) and try once again?

You should use both imges are from recent build.

Regards

AnilKumar

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DM8168 set the DDR CLK