Part Number: OMAPL138B-EP
Other Parts Discussed in Thread: OMAP-L138
Hi,
We are bringing up a custom board based on the OMAP-L138, booting from an 8-bit On-Die ECC NAND Flash.
Issue Description: During normal power-on (cold boot), the device boots cleanly.
However, when the hardware watchdog timer triggers a reset, the ROM Bootloader (RBL) fails to load the boot image from NAND, resulting in a system hang.
Through our investigation, we have identified the root cause: The watchdog reset triggers an internal SoC POR, but power to the external NAND Flash (1.8V) remains active. If the watchdog reset occurs mid-operation, the NAND chip's internal volatile On-Die ECC Feature registers remain dirty, or the internal state machine remains stuck in a BUSY state, and somehow it impacts next ROM read.
If it's an expected reset, by added handling to cleanup and reset NAND chip, then everything is working fine.
Is there any workaround or solutions from TI that can solve this issue?
