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Cannot get DM365 Mobile SDRAM working

 

I have a DM365 connected to Micron MT46H128M16LFB7-5 Mobile SDRAM in x16 mode. I have checked all the connections and it is wired/routed properly between the two chips.

I think the first issue is why I do not see any clock output from the DM365 on the DDR_CLKP and DDR_CLKN (balls W11 and W12 on the DM365). The initialization for the DDR controller is from code on an earlier board with smaller DDR, but that shouldn't affect the clock being there or not.

Here is a dump of the registers. Any ideas?????

DDR_SDRSTAT  = 40000004
DDR_SDCR     = 02034a22
DDR_SDRCR    = 000006a5
DDR_SDTIMR   = 22924b09
DDR_SDTIMR2  = 4a1b1b20
DDR_SDCR2    = 00000000
DDR_PBBPR    = 000000fe
DDR_DDRPHYCR = 000000c5

Something that seems suspicious is the PHY CR value of 0xC5. SPRUFI2.pdf says that bit 6 powerdown the receivers.

Thanks,

Brian

  • Still wondering if anyone at TI can shed some light on why the DM365 won't drive the clock signals on the DDR interface.

    Additional info below are the PLL register settings. Part is sourced by a 24MHz osc and the core frequency is 243MHz. DDR should be fed by 243/2 = 121.5 MHz (it is a 200 MHz mobile DDR). I do not see any clock at all on CLKP and CLKN pins.

    PLL1_PID = 0001080e
    PLL1_RSTYPE = 00000001
    PLL1_PLLCTL = 00000041
    PLL1_OCSEL = 00000010
    PLL1_PLLSECCTL = 00410000
    PLL1_PLLM = 00000051
    PLL1_PREDIV = 00008007
    PLL1_PLLDIV1 = 00008000
    PLL1_PLLDIV2 = 00008000
    PLL1_PLLDIV3 = 00008001
    PLL1_OSCDIV1 = 00000000
    PLL1_POSTDIV = 00008000
    PLL1_BPDIV = 00008000
    PLL1_PLLCMD = 00000001
    PLL1_PLLSTAT = 00000006
    PLL1_ALNCTL = 0000001c
    PLL1_DCHANGE = 00000000
    PLL1_CKEN = 00000001
    PLL1_CKSTAT = 00000009
    PLL1_SYSTAT = 000001ff
    PLL1_PLLDIV4 = 00008003
    PLL1_PLLDIV5 = 00008001
    PLL1_PLLDIV6 = 00008011
    PLL1_PLLDIV7 = 00008001
    PLL1_PLLDIV8 = 00008004