Hi TI:
I've designed my custom board using C6A8168(PG1.1).And have found one of my boards can't boot stablely.I designed for SPI boot first.
The performance of this boad is like this: If the board power down continue for half an hour or longer, the board would not boot when power up(no message print on the uart terminal).But if the board power on and continue for several minutes,then when power up,the board would boot smoothly(the uboot will print the message on uart terminal).
I have made some check and test.The record and analysis are as follows:
1) I test the power rail up sequence and check TCLKIN pin,system clock generator,and found all power rails power up sequence was right,and made sure TCLKIN was tied to GND,and clock generator work soomthly when powr up.
2)When the board can't boot,I check the the clock of DDR3,and found the clock was ok.So I guess that the uboot code from spi flash has been loaded into internal RAM of CPU,and uboot has run and configed the clock of DDR3,but hang before uart printf.
3)I also use XDS debuger tool and CCS to connect the board when it could'nt boot, and found the PC point to 0x2000008C.
4)According to 2)and 3),I guess that the DDR3 may not work satable. Then I config the DDR clock in uboot code to 675/531/400MHz,but found the performance is still the same.
5)I've already modified the DDR3 software leveling parameters by using CCS program( DDR3_slave_ratio_search.out).And also modified DDR3 timming parameters of TIM1、TIM3(I use 4pcs MT41J128M16HA-125:D),but found the performance is still the same.
Are there some advices to give me to solve this problem? And is this the hardware bug of IC (PG1.1 of C6A8168),or PG2.0 will be more reliable?
Best regards
Garth
