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mtdblock error after other GPMC device opened

Jinglin Ji
Prodigy 20 points
Other Parts Discussed in Thread: AM3505

hi,

We're developing a board that is a derivative of the LogicPD AM3517EVM, using AM3505AZER processor with Micron MT29F4G16ABADA nand flash. The board has flash chip on CS0, FPGA on CS1-5. I'm using linux-2.6.37-psp4.02.0.7 sdk.

while trying to read flash data from mtdblock device, AFTER open FPGA device, an error occured: 

end_request: I/O error, dev mtdblock5, sector 312
Buffer I/O error on device mtdblock5, logical block 39

After that, any operations to mtdblock is ruined and got a error like above. I've got to power down and up the board to get flash work properly again, reset does not work. The flash chip is OK, it's not a bad block.

Without opening FPGA device, mtdblock seems works fine. But I got to have flash and FPGA work at the same time.

My FPGA device driver is

struct file_operations fpga = {

.open = fpga_open,

...

}

static int fpga_open(struct inode* inode, struct file* file)

{

printk("FPGA open\n");

return 0;

}

PS, I've tried build JFFS2 on mtdblock, same error occured and JFFS2 file system is broken.

Thanks

  • 0
    TI__Expert 8180 points

    I don't think this is FileSystem related issue, some pointers,

     - The only thing which I can suspect here is GPMC configuration. Can you please check whether you have not configured/using same base address between CS0 and CS1-5

     - What are you doing in fpga_open code?

     - Can you try low-level read/write on NAND while opening fpga? Try using nandutils and/or flash_xxxxx tools.

    Thanks,

    Vaibhav

  • 0 in reply to Vaibhav Hiremath
    Prodigy 20 points

    Thanks Vaibhav,

    GPMC configure is OK, no address overlapping. 

    I've checked my code again, and found our FPGA engineer has added some FPGA firmware download function after fpga_open().

    I've tried downloading another FPGA firmware (a simple FPGA test code, which did nothing at all), and it works fine with nand flash reading/writing. It seems that FPGA is holding data bus while AM3505 trying to read from nand flash.