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Measure of GMACS and GFLOPS on DSP

balgaci
Prodigy 75 points

Hello. I use a TSM320C6670 DSP on an EVM to perform my develops and test. However, I have two doubts that I want to solve before continuing my application.

1) The SoC datasheet says that each core of the CorePac works at 1.2 GHz, with 38.4 GMacs/Core for Fixed Point and 19.2 GFlops/Core for Floating Point. How are those values calculated and what they do represent? I mean, my goal is to develop a FFT at a frequency as high as possible (@ 1 GHz of input samples if possible). Do those measure mean something to my goal?

2) In an application note I found a code of FIR filter with circular addressing. I've trying to code my own but the sample one is still the best choice. May I use the code samples of TI docs in my own and commercial applications without cost?

Thanks for solving my questions.

  • 0
    TI__Guru* 84110 points

    Noryab,

    1) The datasheet numbers are accurate for what they are, the design goal and true capability of the C66x architecture at the stated instruction cycle rate. Your application may use the architecture at this peak rate or your application may use other high-performance features of the device such as caching, wide internal memory buses, 128-bit data types, 8 parallel/simultaneous functional units, and so on. There may have been other forum posts that discussed how to achieve these datasheet figures, but they will most likely not directly affect your application goal.

    2) In most cases, the answer will be "yes" to your question, but knowing only "code samples of TI docs" is not enough information to make any statement here. A lot of example code from TI is provided at no charge under a BSD license, but you will have to be more specific.

    Regards,
    RandyP

  • 0 in reply to RandyP
    Prodigy 75 points

    The code I was talking about is in http://www.ti.com/lit/an/spra645a/spra645a.pdf. I would like to know if I can use it.

  • 0 in reply to balgaci
    TI__Expert 8055 points

    Noryab,

    Ler's be clear about what you are asking and what you really want to do.  

    Looking at the document at the link you are referring to, you're asking if you can take straight  Assembly Language code that was put in an App note that was published 11 years ago.  The short answer is yes, the C6678 is backwards compatible with assembly code from whichever processor this was developed for (which I suspect is some flavor of the C62x).  But your initial question was in the context of the published throughput in the 6678.  I can tell you that while this code will work, there is no way that you will approach the published specs.  

    I would suggest that you not use the existing assembly code.  Actually, I would suggest that you not use assembly code at all.  The published specs should be achievable while writing your code in C as long as you give the compiler/optimizer enough information.  The 6678x has SIMD instructions that will compute multiple values in a single cycle.  You want to ensure that you algorithm uses these by using C Compiler intriniscs where applicable.  

    Regards,
    Dan