Documentation inconsistencies: C5504 datasheet memory map summary

Steve,

Thank you for your clarification of the SARAM size.

Steve Tsang said:

The block size address for the External-CS0 is correct. It is the same as C5505. But we only guarantee the stated block size for C5504.

I don't understand these sentences. For External-CS0, either the CPU byte addresses must be wrong, or the block size must be wrong. I don't know what you mean here by "block size address". That terminology is not used in the memory map summary.

I was referring to both. The CPU address is 010000h to 040000h. The block size is 192 Bytes.

Regards.

There is some failure to communicate going on in the above discussion. I have pointed out two inconsistencies in the documentation. One concerned the SARAM size, the other concerned the size of the External-CS0 space.

With the SARAM size the inconsistency is between between the memory map summary and the rest of the datasheet.Steve has resolved this with his first response and the answer was 192K. Thank you Steve.

The other inconsistency is internal to the memory map summary. The cpu byte address column in the diagram shows the external-CS0 space running between 800000h and 50000h. The block size column in the very same diagram shows the external-CS0 space size as 8M minus 264K. Now 800000h is 8M, but 50000h is 320K not 264K. Is this second inconsistency now understood?