Part Number: DRA829J
Other Parts Discussed in Thread: DRA829, DRA821
Hello
My customer is currently planning to evaluate the eye pattern opening and Bit Error Rate (BER) for the DRA829 by applying arbitrary emphasis settings (e.g., -3.5 dB) to the signal waveform.
In this regard, could you please provide your insights on the feasibility and methodology for the following four points?
Q1. Is there a way to transition the SoC into a "Compliance Test Mode" while it is connected to a USB flash drive, so that test pattern signals(PRBS, XCP0 etc) can be transmitted from the SoC to the USB device?
Q2. Is it possible to transmit test pattern signals(PRBS, XCP0 etc) from the SoC to the USB device without transitioning into Compliance Test Mode? (For example, by detaching the host USB driver and driving test signals directly into the USB SerDes lanes of the DRA829.)
Q3. If the methods in items 1 and 2 are not feasible, is it possible to transmit test signals by connecting the DRA829 to a dedicated USB compliance test board?
Q4. Is there a way to arbitrarily adjust the USB emphasis compensation strength in the DRA829? (For example, by writing specific values to certain registers to change the emphasis strength to -6.0 dB or -3.5 dB, etc.)
Regards,
Oba