DRA829J: USB compliance test

Part Number: DRA829J
Other Parts Discussed in Thread: DRA829, DRA821

Hello

My customer is currently planning to evaluate the eye pattern opening and Bit Error Rate (BER) for the DRA829 by applying arbitrary emphasis settings (e.g., -3.5 dB) to the signal waveform.

In this regard, could you please provide your insights on the feasibility and methodology for the following four points?

 

Q1. Is there a way to transition the SoC into a "Compliance Test Mode" while it is connected to a USB flash drive, so that test pattern signals(PRBS, XCP0 etc) can be transmitted from the SoC to the USB device?

Q2. Is it possible to transmit test pattern signals(PRBS, XCP0 etc) from the SoC to the USB device without transitioning into Compliance Test Mode? (For example, by detaching the host USB driver and driving test signals directly into the USB SerDes lanes of the DRA829.)

Q3. If the methods in items 1 and 2 are not feasible, is it possible to transmit test signals by connecting the DRA829 to a dedicated USB compliance test board?

Q4. Is there a way to arbitrarily adjust the USB emphasis compensation strength in the DRA829? (For example, by writing specific values to certain registers to change the emphasis strength to -6.0 dB or -3.5 dB, etc.)

Regards,
Oba

  • Hi Oba,

    Please refer to this app note on the USB3.0 compliance pattern generation. 

    https://www.ti.com/lit/an/sdaa475/sdaa475.pdf

    I had tested them on the other DRA821 / TDA4 devices but not specifically on the DRA829. 

    You would have to put the device into compliance mode to be able to generate the required test pattern CP0/CP1 but this is when connected to the scope terminated by the 50ohm. I do not think that while connected to the flash drive the test pattern signals can be generated but you can try.

    You should be able to adjust the TX de-emp register:

    DRVCTRL_C0M_OVRD_PREG__DRVCTRL_CP1_OVRD_PREG_j and DRVCTRL_C0_OVRD_PREG__DRVCTRL_CM1_OVRD_PREG should be able to let you control the pre an post-emphasis cursors to set the required emphasis strength. 

    I do see there are USB specific registers: PHY_PIPE_USB3_GEN2_PRE_CFG1__PHY_PIPE_USB3_GEN2_PRE_CFG0, however, since they mention Gen2, they are likely unsupported.