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C55xx reset cause?

SteveG49822
Prodigy 70 points


Is there a simple* way to determine the cause of a reset of a C5515? I'd need to handle a HW resets, SW resets and WDT resets differently.

*I can deal with a complicated method too, maybe handle it in _c_int00?

TIA

Steve

  • 0
    TI__Mastermind 30140 points

    Hi Steve,

    I dont have an elegant solution, but a mess of proposals... I'll check around for a better solution than these.

    See 5.5 DSP Reset of http://www.ti.com/lit/ug/swpu073e/swpu073e.pdf

    A hardware reset loads the interrupt vector pointer called IVPD with FFFFh and, thus, forces the CPU to fetch the reset vector from program address FF FF00h. During a software reset, IVPD remains unchanged; the CPU fetches the reset vector using the current IVPD value.

    So you could change your interrupt vectors after a hardware reset, then if you encounter a SW reset you will branch to your custom reset vector instead of the default FFF FF00h...

    You could also check the value of some registers that are not cleared by a SW reset (but are cleared by HW reset) to check against their reset value...

    For Watchdog, When the timeout event occurs, the watchdog timer resets the entire chip with the exception of the RTC (real time clock). This is a HW reset, so it will always branch to FFF FF00h and reset all core registers.

    Maybe you could utilize the RTC Scratch Registers to store something useful - I'm struggling with exactly what...

    Maybe when you kick the watchdog, you could also toggle XF or GPIO and monitor the kicks off chip...

    You can detect Power-On-Reset if VDD_RTC is not battery powered - the RTC will reset when VDD_RTC goes down, clearing whatever is in your scratch register.

    The RTC Scratch Registers are general purpose memory that can be used to store a value that will be preserved even when the DSP power is off.

    1.2.7 Reset Considerations
    The RTC can be reset by the RTCRESET bit located in the RTC oscillator register (RTCOSC). The RTC can also be reset by an internal POR circuit that monitors VDD_RTC. Neither the RESETN pin nor the DSP's POR can reset the RTC.

    1.2.7.1 Software Reset Considerations
    The DSP can cause a software reset of the RTC when the RTCRESET bit is set to 1. When this occurs, all RTC registers are reset to the default settings. The RTC will not be reset when the RESETN pin goes low. After a RTC software reset, do not access any RTC register for three 32.768kHz clock cycles after setting the software reset bit.

    1.2.7.2 Hardware Reset Considerations
    The RTC has a hardware reset that is tied to a POR circuit that monitors the VDD_RTC. The RTC is not reset with the RESETN pin or the DSP's POR.

    What are the sources of your HW reset?

    Regards,
    Mark