Part Number: SK-AM62P-LP
Core: WKUP R5F
SDK Version: AM62Px MCU+ SDK 10.00.00
Description:
Hi TI Team,
We are currently integrating the PBIST (Programmable Built-In Self-Test) diagnostics for memory array integrity checks on the AM62Px SoC during early boot.
As outlined in the architecture, there are multiple PBIST instances present across different functional domains within the SoC, each associated with a specific set of internal memory regions (RAM groups, cache memories, and peripheral buffers).
Could you please clarify where we can find the complete list and detailed mapping of these memory regions per PBIST instance? Specifically:
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TRM / Documentation Mapping: Which section of the AM62Px Technical Reference Manual (TRM) or Datasheet lists the exact RAM group mappings (Memory Regions) corresponding to each PBIST instance index?
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SDL / Driver Structures: In the MCU-PLUS-SDK SDL (Software Diagnostics Library), where are these memory region definitions and configuration tables declared in the codebase (e.g., header files or configuration structures)?
Any reference documentation, TRM tables, or code references in the SDL path would be greatly appreciated.
Thanks and regards,
Ayyappa T
