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Problems when writting into the IPC register

    I am testing C6678 multicore boot in SPI bootmode.I want to load different applications to core 0 and core1. The bootloader document provides the information as follows:

The application that is executed in core0 should write  the start address of the application to be run on the secondary cores to their BOOT_MAGIC_ADDRESS;it should also

write into the IPC register to trigger an interrupt for each secondary cores.

    I write the following codes(part of the entire application to be run on core 0 ) referencing pcieboot_helloworld.c located at tools\bootloader\examples\pcie.When I run the

project in core 0,the values of address 0x02620038(KICK 0 ), 0x0262003C(KICK1) and 0x02620244(IPCGR1)  remain zeros. They can't be set to the expected number,while

the value of  BOOT_MAGIC_ADDR(1) is set to 0x11834980 . I don't know why. Please help me.

# define DEVICE_REG32_W(x,y) = *(volatile uint32_t *)(x) = (y)

#define KICK0     0x02620038

#define KICK1    0x0262003C

#define MAGIC_ADDR    0x87fffc

#define BOOT_MAGIC_ADDR(x)       (MAGIC_ADDR    + (1<<28)  +  (1<<24) )

#define    IPCGR1    0x02620244

void main()

{

    DEVICE_REG32_W(KICK0, 0x83e70b13);

    DEVICE_REG32_W(KICK1, 0x95a4f1e0);

     DEVICE_REG32_W(BOOT_MAGIC_ADDR(1), 0x11834980);

    platform(1);

     DEVICE_REG32_W( IPCGR1 , 1);

    platform(1000);

   

}

 

   

  • Lin,

    I beleive that you might be able to see the changes, but it will indeed work. Quick way to test it, is load this code in core0 and run and see if the core1 jumped to the branch address. I will try and verify this. 

    Thanks,

    Arun.