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Hardware Ecc for omap3530

Other Parts Discussed in Thread: OMAP3530

Hi,

In our custom omap3530 board we interfaced with mt29f8g08ababawp ( large page 4kb(Micron) ) .According to TRM we identified the changes in the ecc bytes and ecc position .But what are the changes for offset and length in U-boot level.

#ifdef GPMC_NAND4k_ECC_SP_x8_LAYOUT
#define GPMC_NAND_HW_ECC_LAYOUT {\
        .eccbytes = 24,\
        .eccpos = {1, 2, 3,4,5,6,7,8,9,10,11,12,64,65,66,67,68,69,70,71,72,73,74,75,76},\
        .oobfree = {\
                {.offset = 75,\
                 .length = 12 } } \
}

Tell me what other changes in u-boot level to enable to the hardware ecc.

Thanks

bhimesh