Hi,
I am using SPI1 CS2 on my OMAPL138. I am transferring 64000 bytes of data out the SPI DMA TX buffer and receiving 64000 bytes of data on the SPI DMA Recv buffer. What I am seeing is a small glitch in the CS1 line after every 8 Tx clocks on the SPI1. The glitch is 40ns wide and is affecting communication with the CPLD. Do I have something configured incorrectly with my spi?
Will