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UART4 controller mux register configuration in TI814x processor

Guddi
Prodigy 90 points

Hi,

Guddi here, I am using TI814x EVM board. As per this processor there are 6 UART controllers i.e. from UART0,1,2,3,4,5.

UART0,1,2 controllers are getting functional clock from USB_PLL -> PRCM -> Divider circuit (inside PRCM i.e. "B" registers) -> output is 48MHz.

UART3,4,5 controllers have a mux regsiter i.e. "McBSP_UART_CLKSRC", configuring this mux register we will be able to select fucntional clock

to be either SYSCLK8, SYSCLK10 or SYSCLK6.

I am configuring this mux register i.e. McBSP_UART_CLKSRC to "0xA8" so that UART3,4,5 controller's functional clock to be SYSCLK10 (48MHz).

Even though i am configuring this mux register, it is reflecting in the mux register.

Note:

1) Unlocked both PLLSS registers and control mode registers.

2) I am in the supervisor mode.

3) PLLSS initialization has also been done.

 

  • 0
    TI__Expert 6655 points

    Hi Guddi,

    I didn't get what exactly you are looking for,

    Some pointers:-

    We can configure the McBSP_UART_CLKSRC (0x481C5000 + 0x2D8) register to get mux output as SYSCLK10.

    You have to change the clock parent from u-boot, details at

    http://processors.wiki.ti.com/index.php/TI81XX_PSP_PM_Clock_Framework_User_Guide#Change_clock_Parent

    Apart from this you have to enable the corresponding UART clock, CM_ALWON_UART_3_CLKCTRL for (uart4)

    Regards

    AnilKumar

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

  • 0 in reply to Anil
    TI__Genius 15310 points

    Guddi,

    Have you try to use the pinmux utility to check your mux setting?  The util is available to download from the Landing page:  http://processors.wiki.ti.com/index.php/DM814x_Overview.   

    BR,

    Viet

  • 0 in reply to Anil
    Prodigy 90 points

    Anil,

    Thanks for your suggestions.

    Things that has been configured:

    1) Configured McBSP_UART_CLKSRC mux register to 0xA8 so that UART3,4,5 fucntional clock will be SYSCLK10 (48MHz).

    2) Configured all the UART and also L3_Slow clock control registers.

    3) Even after all these configurations, McBSP_UART_CLKSRC mux registers is not getting configured to the required value (0xA8)

        This mux register is always showing reset value (0x00) i.e. taking  SYSCLK8 (192MHz) has functional clock for UART3,4,5 controllers.

     

    Regards,

    Guddi

     

     

     

     

     

  • 0 in reply to Guddi
    TI__Expert 6655 points

    Hi Guddi,

    Are you able to see the register value getting effected after you are writing to that register from u-boot?

    md (will dump the value)

    mw (we can write a value into that register)

    Look into the kernel source and find any one is configuring the same register for different purpose.

    If that is the case, what ever we are changing in the u-boot will not result in the kernel once its up and running.

    Regards

    AnilKumar

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!