In the DM8168 TRM, section 16.2.3.10 FIFO Buffer Management (Optional USEFIFO = 1), there is a discussion of FIFOs for McSPI read and write operations but it appears to be optional.
Is this FIFO implemented in the DM8168?
Regards,
RandyP
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In the DM8168 TRM, section 16.2.3.10 FIFO Buffer Management (Optional USEFIFO = 1), there is a discussion of FIFOs for McSPI read and write operations but it appears to be optional.
Is this FIFO implemented in the DM8168?
Regards,
RandyP