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UART-2 Interrupt is not getting generated in ARM9 processors of OMAP-L137

Other Parts Discussed in Thread: OMAP-L137

Hello,

I am trying to work on UART-2 in Eval board using Interrupt mode in ARM9 processor of OMAP-L137. I took the example from below TI link;

http://processors.wiki.ti.com/index.php/QuickStartOMAPL1x_rCSL

 From this QuickStartOmapL1x_rCSL I am trying to run “UART_interrupt_loopback_armL137” project.

I have following queries;

1. UART transmit interrupt is not getting generated even though I can see that in LSR register of UART module is

showing 0x60 i.e. THRE & TEMT bit is 1 (THR & TSR is empty). But, fail to see the bits getting set in INTID of IIR register.

 2. Functions _enable_IRQ() and _disable_IRQ() are for what purpose? It is not going to the location where it is defined (I want to know its definition

Is it in Assembly file??). Also, if we are Setting HIEISR register to 1 i.e. set IRQ enable of the host interrupt given in the INDEX then why we are

using _enable_IRQ().

3. In AINTC module which register will help us to know the status of interrupt i.e. which interrupt is generated currently. As, all the registers are showing that

they are writeable registers.

4. While debugging UART interrupt code I found some unknown registers like SITR1 – SITR3 and DSR1 – DSR2 in AINTC module,

whose description is missing in the Technical datasheet (SPRUH92). Can you please tell what are they...

 

Regards,

Priya