now, I work with c6474. I have problems with configure BIOS. My question is how to make .tcf file for TSM320C6474. Thank
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Can you tell us more about your environment? Are you using CCS and if yes, which version? Are you looking for DSP/BIOS 5 examples for C6474? All versions of BIOS come with examples, and the documentation provided with BIOS describes how to build examples.
Hi Le,
have you taken a look at the DSP/BIOS Textual Configuration Tool (Tconf) User's Guide? (spru007h.pdf) The documentation comes with with the DSP/BIOS product installation.
Chapter 1 goes over what .tcf files are and what tools are available for them. If you create a new DSP/BIOS project in CCS, it should provide you a .tcf file.
Hi Le,
What are you planning to do with SRIO?
The .tcf file is used to configure DSP/BIOS, not the serial RapidIO (SRIO).
To use the C6474's SRIO, you can use the C6474 Chip Support Library (CSL).
Hello Tom,
I use examples of C6474 CSL, I want to connect to RTDX so as receiver data.
I have to configure BIOS/DSP to link RTDX.
My function to read data is
RTDX_enableInput( &ichan );
RTDX_read(&ichan, &TempData, sizeof(TempData));
I need configure .tcf file for link RTDX.
can you help me!
Thank
Hi Le,
There are some examples that use SRIO to communicate between other TI DSPs. The software can be downloaded here: Message Queue Transport (MQT). There is some documentation in the installation directory: RapidIO MQT for TMS320C64x (SPRAAD3B.pdf). In this case RapidIO is used to facilitate communication between other TI DSPs or SoCs.
From my understanding RTDX (HSRTDX) is used to let a host computer communicate with the target DSP using a JTAG interface. (DSP/BIOS v5.41 User Guide Section 3.10)
From where do you need to read your data from? Another DSP? I don't think you can use the SRIO with RTDX, but I will ask around and get back to you.
Hi Tom,
My project is to transfer a image file from 2 Kit C6474. I use RTDX to read image file throught JTAG interface.
can i use .tcf of swi examples to link RTDX?
I purpose your advices to configure its.
Have a nice day!
Thank!
Hi Le,
perhaps you may want to look at using CIO or DSS scripts to transfer these images.
http://e2e.ti.com/support/embedded/bios/f/355/t/171505.aspx#627372
Hello Tom,
My project is to use SRIO of c6474.
I have used examples of swi configure at C:\CCStudio_v3.3\bios_5_33_01\packages\ti\bios\examples\basic\swi\evm6474. I can receiver the data by using RTDX.
the file link.cmd of SCL C6474 is different with swicfg.cmd of swi examples.
How to combine link.cmd to swicfg.cmd?
if i do not use link.cmd of SCL C6474, what happens?
the form of link.cmd is
/****************************************************************************\
* Copyright (C) 2000 Texas Instruments Incorporated. *
* All Rights Reserved *
* *
* GENERAL DISCLAIMER *
* ------------------ *
* All software and related documentation is provided "AS IS" and without *
* warranty or support of any kind and Texas Instruments expressly disclaims*
* all other warranties, express or implied, including, but not limited to, *
* the implied warranties of merchantability and fitness for a particular *
* purpose. Under no circumstances shall Texas Instruments be liable for *
* any incidental, special or consequential damages that result from the *
* use or inability to use the software or related documentation, even if *
* Texas Instruments has been advised of the liability. *
****************************************************************************
* *
* Written by : *
* Preyas Kamath *
* Texas Instruments *
* 14 April, 2005 *
* *
* *
* *
\***************************************************************************/
-c
-heap 0x2000
-stack 0x2000
MEMORY
{
/* 16K L1 cache length = 0x3FFF
32K L1 cache length = 0x7FFF
*/
VECS o=0x00E00000 l=0x00000200
L1P: o=0x00E00200 l=0x00007DFF
L1D: o=0x00F00000 l=0x00007FFF
/* 32K L2 cache length = 0xF7DFF
64K L2 cache length = 0xEFDFF
128K L2 cache length = 0xDFDFF
256K L2 cache length = 0xBFDFF
*/
/* Use global addresses for L2 */
L2: o=0x10880000 l=0x001EFFFF
SDRAM: o=0x80000000 l=0x00800000
/*SDRAM: o=0x80000000 l=0x10000000*/
}
SECTIONS
{
.csl_vect > L2
.bss > L2
.far > L2
.data > L2
.text > L2
.cio > L2
.cinit > L2
.boot > L2
.const > L2
.stack > L2
.sysmem > L2
.switch > L2
.testMem > L2
.extData_sect > SDRAM /* External memory data space */
}