Configure AM335x CLKOUT2

Keldy,

Ch 8 of the TRM has an explanation of how to configure CLKOUT2.  Sources for CLKOUT2 include L3F clock, DDR clock, PER_M2 and Pixel clock, so you could only get 25MHz if one of those is a multiple.

Regards,

James

Hi James,

i choose the L3Fclock (core PLL) as souce of CLKOUT2. Am i correct with my configuration below? 

CONF_XDMA_EVENT_INTR1 = 0x3; //set pin mux to mode 3

 CM_CLKMODE_DPLL_CORE = 0x04; // set PLL to bypass mode

while(CM_IDLEST_DPLL_CORE != 0x00000100); //wait ST_MN_BYPASS = 1 to ensure PLL is in bypass

CM_CLKSEL_DPLL_CORE = (1000 << 0x8) | 23; // set DPLL_MULT = 1000, set DPLL_DIV = 23, Core PLL = 1GHz

CM_DIV_M4_DPLL_CORE = 10; //CORE_CLKOUTM4 = 200 MHZ

CM_CLKMODE_DPLL_CORE = 0x7; //set DPLL in lock mode

while(CM_IDLEST_DPLL_CORE != 0x1); //wait to ensure DPLL in lock mode

CM_CLKOUT_CTRL = 0xB9; // enable CLKOUT2, select L3 clock, divide 8 (200Mhz /8 = 25Mhz)

Thanks & Regards

Keldy