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DM8148 EMAC_RMREFCLK

I read in the Datasheet the the RMREFCLK (Pin J27) could be INPUT or OUTPUT.

But how is the Pin to be defined to act as output?

Fig.9-2 of the technical Reference Manual shows the 3PSW Subsystem clocking block diagram.

There is written: rmii_refclk I or O depends on PINMUX424 - but where can the direction be defined since no PINMUX424 register is defined for the DM8148.

Thank you

Wolfgang

  • Wolfgang

    You can configure RMII ref clock as output from SoC or input from Phy in the following register.

    2.9.1.147 RMII_REFCLK_SRC Register (offset = 2E8h)

    with regards

    Mugunthan V N

  • Dear Mugunthan and experts,

    I also want to use EMAC1 as RMII mode, bu I connect to a usb-ether component.

    Architecture:  DM8148 EMAC1 RMII <---> Reverse-RMII USB-ether ( AX88772B)  <---> USB Host

    Do you mean to configure RMII_REFCLK_SRC = 0x01 to let RMREFCLK as input ?

    Is the address of RMII_REFCLK_SRC in ti8148 0x481802E8 ?? (PRCM Base address is 0x48180000  or 0x48183000 ??)

    By the way, if EMAC0 runs at RGMII, EMAC1 runs at RMII,

    How do I set GMII_SEL Register (0x48140650) ??

    0x48140650 should be 0x00000106 or 0x00000306 ???

    thx ~

    HB