Dear E2E:
Thank you for your help.
I have one more question about McASP.
1. When Transmit Frame Sync released from reset (XFRST bit in GBLCTL register set to '1' the Frame Sync (AFSX) starts generating as programmed. Is it correct?
2. Will AFSX start immediately as active output and then continues switching according to the programmed cycle?
3. Or the first active AFSX will appear on the McASP output after the number of Serial clocks (AFSX period which can be 256 clocks for example)
4. Is there any deterministic delay from XFRST =1 to the first AFSX active on the McASP output?
Thank you,
Boris
Dear E2E: