Figures: http://www.sigcon.com/images/news/9_07a.gif
In this article:
http://www.sigcon.com/Pubs/news/9_07.htm
Doctor Johnson discusses why it's better to connect power pins in accordance to figure 1a, rather than 1b. (to avoid inductance caused by the direct connection). However, in the Hawkboard design, they've used the scheme of 1b. (Capacitor and pin share 1 via that is connected to the power plane). But I know that the Hawkboard has issues, so I'm not sure how closely I should follow their design.
Anyway, my question is, will there be any problems if I use the same scheme as the hawkboard to connect power pins to bypass caps? Can I just use a via that is connected to the power plane, and connect both the cap and the power pin to the same via? (Same concept for ground as well). Or will this not work?
I guess the problem with the scheme in figure 1a, is the increased via count which might be tricky or almost impossible to cope with due to the density of the BGA.
I'm asking in regards to two components, the OMAP-L138 and the DDR2 memory chip from Micron (84 ball BGA)
Any help would be appreciated!
Here's a picture of how they've done it on the Hawkboard:
http://img14.imageshack.us/img14/9523/viahawk.png
-Koteich