how to unfreeze HIPIRn register

Priya Tiwari

Hello,

We are using UART-1 and UART-2 interrupts in our project where UART-1 priority is higher than that of UART-2 as System interrupt of UART-1 is 53 and that of UART-2 is 61.Both the interrupts are getting occured properly but when i am setting CR Register = 0x00000010 i.e. PRHOLDMODE =1 to avoid race condition while servicing multiple interrupts.

When we did this then UART-2 interrupt is not at all occuring always UART-1 ISR is getting executed. Even i try writting HIPIR2 = 0x3d (0x35) so that UART-2 isr will get executed. But fails to do so.

Please tell me how to unfreeze HIPIRn register and where it should be written i.e. in AINTC initialization or in ISR....?

My AINTC intialization code contains:

// Reset AINTC

AINTC->ECR1 = AINTC_SYSINT_0_31_ALL;

AINTC->ECR2 = AINTC_SYSINT_32_63_ALL;

AINTC->ECR3 = AINTC_SYSINT_64_91_ALL;

AINTC->SECR1 = AINTC_SYSINT_0_31_ALL;

AINTC->SECR2 = AINTC_SYSINT_32_63_ALL;

AINTC->SECR3 = AINTC_SYSINT_64_91_ALL;

AINTC->CR = 0x00000010; //Enable priority holding mode

//Assign UART ISR handler to system ISR table

sysISRtbl[AINTC_EVENTID_UART_INT1] = UART1_isr;

sysISRtbl[AINTC_EVENTID_UART2_INT] = UART2_isr;

// Assign the ISR Table Address to VBR

AINTC->VBR = (unsigned int) sysISRtbl;

// Declare ISR Size (Function Pointer = 4 bytes)

AINTC->VSR= 0;

// Map UART1 and UART2 Interrupts to Channel 2

AINTC->CMR[13] |= 0x00000200; //CHNL_NPlus+1, for UART1

AINTC->CMR[15] |= 0x00000200; //CHNL_NPlus+1, for UART2

// Enable UART1 Interrupts

AINTC->ESR2 = 0x20200000; //Enabling UART-1 (53) and UART-2 (61)

// Enable IRQ Interrupts

AINTC->HIEISR= 1;

// Enable Host Interrupts

AINTC->GER = 1;

Regards,

Priya

over 13 years ago

Victor Chan over 13 years ago

Intellectual 775 points

Hello,

It was painful to get priority nesting to work properly on this interrupt controller. However, this worked for me and I am servicing UART0, UART2, couple of timers and couple of GPIO interrupts using only IRQ. The priorities are as follows starting with highest : Timer1, GPIO1, Timer2, GPIO2, UART0 & UART2(same priority)

Using your code after you set ESR2, do the following:

aintc.CR = CR_PR_HOLD_MODE | CR_MANUAL_NESTING; // BTW, I couldn't get auto nesting to work.

aintc.GER = 1;

aintc.HIER = HIER_IRQ_ENABLE;

I don't configure the HIEISR register.

Your IRQ decode handler needs the following:

void irq_decode_handler(void)

{

U32 hipir2 = aintc.HIPIR2;

if (hirpir2 & AINTC_NO_INTERUPT) {

aintc.HIPIR2 = hipir2;

return;

}

void (*(irq_vector)(void) = (void*)aintc.HIPVR2;

U32 hinlr2 = aintc.HINLR2;

aintc.SICR = hipir2;

irq_vector();

aintc.HINLR2 = hinlr2;

}

void uart1_handler(void)

{

aintc.HINLR2 = 2 ; // This is the priority that you set for UART1 in its CMR[13] register

enable_interrupt();

uartx_handler(UART1); // ISR for UARTx

disable_interrupt();

}

void uart2_handler(void)

{

aintc.HINLR2 = 2 ; // This is the priority that you set for UART2 in its CMR[15] register

enable_interrupt();

uartx_handler(UART2); // ISR for UARTx

disable_interrupt();

}

Cheers,

Victor

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how to unfreeze HIPIRn register