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PCIe boot without IBL with R2.0 silicon - How to generate interrupt?

Jonathan White
Intellectual 830 points

We have been booting over PCIe with the IBL workaround installed (with both R1.0 and R2.0 silicon of C6678).

Now we are trying to boot without the IBL installed (with R2.0 silicon).

Up to now we have been following closely the example code in C:/Program Files/Texas Instruments/mcsdk_2_00_01_12/tools/boot_loader/examples/pcie/linux_host_loader

It seems that the RBL requires an extra step (not required when using the IBL) of the host sending an interrupt to the core 0 of the C6678.

But the document SPRUGY5A only hints at this.

So is it enough to add one extra line of code to our host:

     uint32 * MSI_Address = convertToPciAddress( 0x21800054 ); // Address of the MSI Interrupt IRQ Register)

     * MSI_Address = 0x00000000; // Write 0 to the MSI Interrupt register in the DSP.

Is that what we are supposed to do differently when we stop using the IBL workaround for PCIe, or is there more to it?

  • 0
    TI__Genius 12065 points

    Jonathan,

    First, there is updated MCSDK release as 2.00.05.17 in the following page:

    http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/latest/index_FDS.html

    You can take a look at the release note to see if any update applies to you.

    IBL update is mainly for the PLL fix which is not needed for 2.0 Silicon.

    For the PCIe interrupt generation, the bootloader code should configure the interrupt controller correctly and you can try the following two to trigger the MSI interrupt:

    1. write 0x0 to MSI_IRQ (0x21800054) to trigger MSI0 interrupt remotely by the host.

    2. Write 0x1 to MSI0_IRQ_STATUS_RAW (0x21800100) to trigger MSI0 which is used for debug purpose.

    The application address in BOOT_MAGIC_ADDRESS will be copied to program counter after the interrupt.

    Please make sure the correct value is written to the correct MSI register over the PCIe link. Please let us know if it is working for you. Thanks.

    Sincerely,

    Steven

  • 0 in reply to Steven Ji
    Intellectual 830 points

    Hi Steve, thanks for your reply.

    Yes, writing 0x0 to MSI_IRQ (0x21800054) does wake up the RBL (ROM Boot Loader), which had been sleeping in idle.

    I checked MCSDK 2.00.05.17, but the PCIe boot example code (pciedemo.c) did not have the above change.

  • 0 in reply to Jonathan White
    Expert 1200 points

    Thanks Jonathan for this great explanation of the solution and resolution.