AM335x Booting from XIP (NOR-Flash): Address lines A12-A27

Martin Wegscheid

Hello,

at the TRM (SPRUH73C) chapter 26.1.7.2.2 is mentioned:

Specifically, external logic is needed to isolate the upper address lines (A12–A27) of the NOR flash from the device pins and drive them low during boot. Once the initial software starts running, it can appropriately configure the pinmux setting for the lines and remove the isolation to allow GPMC to drive all the address lines.

May I ask some questions?

What is meant with external logic? Driving the address lines A12-A27 of NOR-Flash low with pull down resistors via bus switch (e.g. LVC16244)?
With which pin of AM335x should I use for releasing the switches after first boot-up?
Do you have some kind of reference schematics that do not harm rise and fall times or timing requirements for NOR Flash communication?
How many nanoseconds maximium the external logic could consume?

Best regards,

Martin

over 13 years ago

0 Y tck over 13 years ago

Intellectual 835 points

I have the same question,the actual address is 0x0000000 or 0x08000000 in GPMC CS0???

0 Steve Kipisz over 13 years ago in reply to Y tck

TI__Genius 15510 points

The address is 0x08000000.

Steve K.

0 Y tck over 13 years ago in reply to Steve Kipisz

Intellectual 835 points

thank you ！

So, what I understand is that the address 0x08000000 is a virtual address(memory address),and the corresponding physic address is 0x00000000, since the high address line is not driven at booting time, is this right???

Yantck

0 Marcus Young over 12 years ago

Prodigy 10 points

I would like to know everything Martin is asking too, or if there is any other work around since I have a system NOR flash requirement.

Regards,

Marcus

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AM335x Booting from XIP (NOR-Flash): Address lines A12-A27