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USB CPPI 4.1 DMA

Mughees Chohan
Intellectual 530 points

Hi,

I have some questions regarding CPPI dma usage in DM8148.

1. Why do we have CPPI Mem1 Base Address Register when the Location of data buffers is already contained in the Descriptors we define?

2. In Rx Channel N Host Packet Configuration Register does Buffer manager and Buffer ques refer to Queue Manager and the some of the Descriptor Queues respectively?

3. I have all the descriptors of the same size. Do I still need to define 16 memory regions and give their addresses and sizes in Queue Manager Memory Region R Base Address Register and control registers or can I use only a single large enough memory region? If yes what to write in the remaining  Queue Manager Memory Region R regsters ?

Thank you.

  • 0
    Intellectual 530 points

    Some more questions please.

    1. In CPPI DMA Teardown Free Descriptor Queue Control Register (TDFDQ)  why is there mentioned 2K queues when there are only 156. Why there are so meny teardown descriptor queues assignments in different registers. For example in TX Channel N Global Configuration register etc. 

    2. In Rx Channel N Host Packet Configuration Register A (RXHPCRAn) and B. What are host type packets? And why these queues are needed. What are first, second RX buffer in a host type packet?

    Regards