Dear All,
I have configured the Receive interrupt for CAN.
Flow of Program :
1. Initialise CAN .
2. Setup Transmit/Receive Mailbox.
3. I have configured Mailbox 1 as transmit ..MID 0x15AC0000..Data Length : 4.
4.Mailbox 0 as Receive Mailbox. MID 0x1CA00000..Data Length : 4.
5. I am using transmit function to transmit data :
uint32_t CAN_transmit(uint8_t mailbox, uint8_t *data, uint8_t length)
{
uint32_t mask = 1 << mailbox;
uint8_t i;
uint32_t begin_time;
debug_print("In TXXXXXXXXXXX");
// verify we're not exceeding our set length
if (length > (CANMCF(mailbox) & 0xF))
{
return (ERR_INVALID_PARAMETER);
}
for (i=0; i < length && i < 4; i++)
{
OUT_REGL(CANMDL(mailbox), (IN_REGL(CANMDL(mailbox)) << 8));
SETBIT_REGL(CANMDL(mailbox), data[i]);
}
for (; i < 4; i++)
{
OUT_REGL(CANMDL(mailbox), (IN_REGL(CANMDL(mailbox)) << 8));
}
for (; i < length && i < 8; i++)
{
OUT_REGL(CANMDH(mailbox), (IN_REGL(CANMDH(mailbox)) << 8));
SETBIT_REGL(CANMDH(mailbox), data[i]);
}
for (; i < 8; i++)
{
OUT_REGL(CANMDH(mailbox), (IN_REGL(CANMDH(mailbox)) << 8));
}
// send the message!
SETBIT_REGL(CANTRS, mask);
// wait for transmission ack
begin_time = USTIMER_get();
while (!CHKBIT_REGL(CANTA, mask)
&& ((USTIMER_get() - begin_time) < CAN_TIMEOUT_US));
if (!CHKBIT_REGL(CANTA, mask))
{
// Timeout occurred
return ERR_FAIL;
}
debug_print("Fun CANTA %x\n",IN_REGL(CANTA));
// clear transmission ack so we can send again
SETBIT_REGL(CANTA, mask); //copied to ISr
begin_time = USTIMER_get();
while (CHKBIT_REGL(CANTA, mask)
&& ((USTIMER_get() - begin_time) < CAN_TIMEOUT_US));
if (CHKBIT_REGL(CANTA, mask))
{
return ERR_FAIL;
}
return (ERR_NO_ERROR);
}
After transmitting the handler Goes to IRQ24_Handler : SECC0_INT interrupt Line.
The CANGIF0 : register Shows value : 0xC000 : Two interrupt have been occured one is GMIF0 : Transmission Over and other is AAIF0..transmission aborted. I am transmitting only once. Not able to understand why two interrupts are raised at a time. the Processor goes twice in the Service routine. first time i receive the Exact data..but the data received on second interrupt gets corrupted. I think i am missing some interrupt Clearing Register . Need Expertise view on this
Thanks and reagrd's
Hrishikesh.