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How to simulate DQ_CK/DQ_CKN differential line.

Motoyasu Hattori
Genius 10965 points
 
Hi,
 How can my customer simulate "DQ_CK/DQ_CKN differential line" using IBIS model?
 
 We can simulate both the differential line of DDR_DQS0/DDR_DQSN0 (pin# L1/L2) and line of DDR_DQS1/DDR_DQSN1 (pin# P1/P2).  That is because we can find L1/L2 and P1/P2 in the [Diff Pin] Keyword of "IBIS data [SPRM552B]".   But, we have never seen DQ_CK/DQ_CKN (pin# D2/D1).  So, when we add D2/D1 pins in the [Diff pin] in the IBIS data as follows, can we simulate DQ_CK/DQ_CKN correctly?  Please let me know.
 
 
[Diff Pin]   inv_pin    vdiff    tdelay_typ
L1           L2         200m     NA
P1           P2         200m     NA
D2           D1         0        NA
 
P.S. According to IBIS Specification, "For output only differential pins, the vdiff entry is 0 V."
 
Thanks and best regards,
 M.HATTORI.
 
  • 0
    TI__Genius 9190 points

    Hello Hattori-san,

    internally those pins are not truly differential pins that is why the model doesn't have them as differential.  I know that customers in the past have simply added them to the [Diff Pin] section and that got their simulation working properly.  So, I would definately tell them to go ahead with this.  

  • 0 in reply to Jeff Culverhouse
    TI__Genius 9190 points

    I just caught your comment about 0v for the differential voltage.  I think that it will work with 0v in there since they are not truly differential signals so we should have to worry about this, but if that doesn't seem to work I would put something like 100m just to give it some non zero value and we know that the signal will definately be more than 100mV different.