We tried the following thing but dint worked.
SmartReflex control of the VDD1 and VDD2 regulators can be enabled by setting the DCDC_GLOBAL_CFG[3] SMARTREFLEX_ENABLE bit to 1. To perform VDD1 voltage control through the SmartReflex interface, the device provides the VDD1_SR_CONTROL register. The VDD1_SR_CONTROL MODE bit field can be set to 0 to put VDD1 in an ACTIVE state; setting the field to1 moves VDD1 to a SLEEP state. VDD1 output voltage can be programmed by setting the VDD1_SR_CONTROL VSEL bit field. VDD1 output voltage is given by VSEL*12.5 mV + 600 mV.
Can anybody let us know if any additional settings is required?