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AM3703 DDR addressing and compatibility

Other Parts Discussed in Thread: AM3703

Hi,

I am using AM3703CUS100 part and need 512MB DDR memory.

I am planning to use two 2Gbit chips from micron - MT46H128M16LFCK-5. I want to connect these two chips on a single chip select and system should work as single 4Gbit chip with x32 bus for AM3703. I need some clarification regarding address multiplexing in AM3703.

As per DDR configuration, addressing requirement is as shown below. AM3703 supports many dedicated MUX schemes but I am not able to find any MUX schemes for two x16 chips with support of A[13:0] for row address and A11, A[9:0] for column addressing which is required by DDR. 

There is an option for selecting flexible address multiplexing (using SDRC_MCFG_p register bit ADDRMUXLEGACY = 1). But I am not able to find how to select column addressing in this configuration such that A11, A[9:0] are used for column addressing and A10 is not used and also how to select A[13:0] for row addressing.

Does AM3703 support these addressing requirements? Is the DDR configuration which I am trying feasible with AM3703?

Regards,

Vini