Hi,
We have used TI's TMS320C6474FZUN in our board. We have developed two symmetrical boards using the same DSPs. In our board DSP will communicate with FPGA(Stratix IV Altera device using SRIO interface. In both the boards SRIO communication happens without any problem initially, but after some time in one board SRIO-0 is not working properly where as in another board it is working properly. While debugging this problem we happened to see TMS320C6474 errata for Silicon Revisions 2.1, 1.3, 1.2 Errata. In that for SRIO issues they have given two points. Could you confirm that whether SRIO will work initially and after some time it will stop working because of the issues stated in 2.1.1 Potential serdes clocking issue, 2.1.9, SRIO May Fail to Send Interrupt for Completed TX or RX Message. If this issue is due to the issue mentioned in 2.1.9 of errata silicon version (2.1, 1.3, 1.2). Could you suggest DSP with latest silicon version other than 2.1, which don’t have these issues (If any latest version is released)? We have referred Literature Number: SPRZ283C Errata for 2.1.1 and 2.1.9.
Regards,
K.V.Ramasamy