We found a bug in our developed hardware plattform, the error is that we have not connected the
SRIOSGMIICLKP and SRIOSGMIICLKN, because we thought that this is clock for Rapid IO, we have overlook that this is the clock for the ethernet interface too.
My question is, is there (maybe not documented) a possiblity to derive this clock from an internal clock, e.g the PASSCLK can be derived from the CORECLK instead of using the PASSCLK pins, so that we can use the the ethernet interface ?
Thx
